V.22 bis Modem with AT Commands
CMX866
©
2008 CML Microsystems Plc
37
D/866/5
Figure 9a Rx Modem Data Paths
Whenever a new character is copied into the DSP Rx Data Register, the Rx Data Ready flag bit of the
DSP Status Register is set to 1 to prompt the on-chip µController to read the new data and, in Start-Stop
mode, the Even Rx Parity flag bit of the DSP Status Register is updated.
In Start-Stop mode, if the Stop bit is missing (received as a 0 instead of a 1) the received character will
still be placed into the DSP Rx Data Register and the Rx Data Ready flag bit set, but the DSP Status
Register Rx Framing Error bit will also be set to 1 and the USART will re-synchronise onto the next 1 – 0
(Stop – Start) transition. The Rx Framing Error bit will remain set until the next character has been
received.
Figure 9b Rx USART Function (Start-Stop mode, 8 Data Bits + Parity)
If, for any reason, the on-chip µController has not read the previous data from the DSP Rx Data Register
by the time that new data is copied to it from the Rx Data Buffer, then the Rx Data Overflow flag bit of the
DSP Status Register will be set to 1.
The Rx Data Ready flag and Rx Data Overflow bits are automatically cleared to 0 when the DSP Rx Data
Register is read by the on-chip µController. The handling of these low-level status flags is performed
automatically by the on-chip µController and is transparent to the user.