V.22 bis Modem with AT Commands
CMX866
©
2008 CML Microsystems Plc
12
D/866/5
Depending on the &Dn configuration, if the DTRN pin is taken high at any time whilst the CMX866 is in
Data Transfer mode, a fixed, 100ms timeout is started. On completion of the timeout, the CMX866 will
return to Command mode, enabling further AT commands to be sent. If the DTRN pin goes high whilst
the CMX866 is in Command mode, the action is ignored. AT commands can be sent providing CTSN and
RTSN are low (ie DTRN can be either high or low). A low to high transition on the ESC pin also has the
same effect of returning the CMX866 from Data Transfer mode to Command mode, but with immediate
effect. The &Dn command configures these options, see section 1.5.4.4 for more details.
If the RTSN pin is taken high at any time whilst the CMX866 is in Data Transfer mode, a timeout is started
whose value is set in the S28 register (0 = timeout disabled). On completion of the timeout, the CMX866
will return to Command mode and take CTSN high. If the RTSN pin goes high whilst the CMX866 is in
Command mode, the CTSN pin goes high and the action on the RTSN pin is ignored. Information
transfer can only restart when the RTSN pin is taken low again and the CMX866 responds by taking
CTSN low.
1.4.4 RESETN
pin
The CMX866 has an internal power-up reset function which is activated whenever power is first applied to
the device. This reset function resets all of the on-chip µController registers, including the S-Register
settings, and then performs an initialisation sequence which resets the internal DSP and subsequently
places it in a powersave state, loads the factory default values into the S-Registers and places the on-
chip µController into an operating state. This internal power-up reset function is OR-ed with the RESETN
pin. The state of the CMX866, including its outputs, is undefined for approximately 4.7ms, until this reset
operation is complete.
When the RESETN pin is taken low, the on-chip µcontroller is reset and its program counter held at
address $0000. It remains in this condition until the RESETN pin is taken high, at which time the software
reset operation described above is performed. The RESETN pin must be held low for at least 5.0µs.
When the CMX866 first enters the operating state, it reports its configuration as follows:
•
CMX866 waits for DTRN to go active (low)
•
CMX866 takes the DSRN pin active (low) to indicate its readiness to
communicate with an external host µC
•
CMX866 waits for RTSN to go active (low)
•
CMX866 sends "CMX866" identification message to external host µC
(equivalent to the host µC issuing an ATI0 command)
•
The on-chip µController now powers up the DSP part of the CMX866
•
The DSP is automatically reset then requested to perform an internal diagnostic self-check,
which takes about 2.9ms to complete
•
On successful completion, CMX866 sends "DSP checksum OK" identification message to
the external host µC. If not successful, CMX866 sends "DSP Error" message to the
external host µC. In the latter case, the CMX866 should be reset again by taking the
RESETN pin low
•
The on-chip µController now powers down the DSP part of the CMX866
•
The on-chip µController is now in the Command mode operating state and is ready to
accept AT commands from the serial interface, approximately 55ms after DTRN went low
•
CMX866 takes the CTSN pin active (low) to indicate its readiness to
communicate with an external host µC
Note that the on-chip µController does not perform its own internal diagnostic self-check as this
is not considered necessary.