Schematic Diagrams
DDR3 Channel B SO-DIMM_1 B - 9
B.Sch
e
m
a
tic D
iag
rams
DDR3 Channel B SO-DIMM_1
M_DATA_B[63:0]
M_DATA_B57
M_MAA_B12
M_MAA_B3
CK_M_CH1_0_DP
M_DATA_B25
M_CAS_B_N
M_SCS_B_N 0
ChannelB
PM_EXTTS_DDR#
PM_EXTTS_DD R#
M_DATA_B36
M_D ATA_B15
DDR1_DRAMRST
MS:8.5 / 5 / 8.5
SL: 4 / 4 / 4
CK_M_CH1_0_DN
15mils trace
34mils spacing
M_DATA_B47
M_DQS_B_D N1
M_MAA_B4
M_MAA_B13
M_RAS_B_N
Layout Note:
M_DQS_B_DP[7:0]
CLK0/space/CLK_1
SO-DIMM1
SCLK
M_SCS_B_N 1
M_WE_B_N
M_DATA_B58
M_MAA_B[15:0]
ChannelB
20mils trace
M_SBS_B0
M_SCS_B_N0
M_SCKE_B[1:0]
M_DATA_B26
M_SCS_B_N1
M_DATA_B37
Z0803
M_SCKE_B0
M_D ATA_B16
CK_M_CH1_1_DN
CK_M_CH1_1_DP
Z0802
M_SCKE_B1
M_CAS_B_N
Z0801
SA0_DIM1
M_WE_B_N
M_RAS_B_N
M_SBS_B[2:0]
SA1_DIM1
SCLK
M_ODT_B0
SDATA
M_ODT_B1
SDATA
M_D ATA_B0
DDR1_DRAMRST
M_DATA_B48
M_DQS_B_D P0
M_DQS_B_DN[7:0]
CK_M_CH1_0_DN
CK_M_CH1_0_DP
CK_M_CH1_1_DN
CK_M_CH1_1_DP
M_MAA_B0
M_DQS_B_D N0
M_ODT_B[1:0]
M_DQS_B_D N2
M_MAA_B5
CLOSE TO SO-DIMM_1
D IMM_CA_VREF_B
M_D ATA_B17
M_DQS_B_D P1
M_DATA_B27
M_DATA_B59
M_MAA_B14
M_MAA_B6
M_DQS_B_D N3
M_DATA_B49
M_D ATA_B7
M_DATA_B38
M_DQS_B_D P2
M_D ATA_B18
M_DATA_B28
M_DATA_B29
M_MAA_B7
M_DQS_B_D N4
M_DATA_B50
M_D ATA_B8
M_DATA_B39
M_D ATA_B9
M_DATA_B40
M_DQS_B_D P3
M_D ATA_B19
M_D ATA_B20
M_D ATA_B1
M_MAA_B8
M_DQS_B_D N5
M_DATA_B51
M_DATA_B41
M_D ATA_B10
M_DQS_B_D P4
M_DATA_B60
M_DATA_B30
M_D ATA_B21
M_D ATA_B2
M_MAA_B9
M_DQS_B_D N6
M_DATA_B52
High
High
Low
Low
Low
Low
M_DATA_B42
M_DATA_B61
M_D ATA_B11
M_DATA_B31
M_DATA_B32
M_DATA_B22
M_D ATA_B3
M_DQS_B_D N7
M_DATA_B53
M_DQS_B_D P5
M_DQS_B_D P6
M_DATA_B43
M_DATA_B62
M_D ATA_B12
M_DATA_B44
M_DATA_B33
M_D ATA_B4
M_DATA_B54
M_SBS_B1
M_SBS_B2
M_MAA_B10
M_MAA_B1
M_DQS_B_D P7
M_DATA_B63
M_D ATA_B13
M_DATA_B34
M_DATA_B23
M_D ATA_B5
M_DATA_B55
M_D ATA_B6
M_DATA_B56
M_MAA_B11
M_MAA_B2
M_DATA_B45
M_DATA_B46
M_D ATA_B14
M_DATA_B35
M_DATA_B24
SA1
SA0
M_DQS_A_DN8
M_DQS_A_DP8
M_MAA_B15
C78
10u_10V_Y 5V_08
NC3
NC_04
C617
0.1u_10V_X7R_04
C 84
4.7u_6.3V_X5R_06
R441
1K_1%_04
C82
10u_10V_Y 5V_08
R426
10K_04
C676
0.1u_10V_X7R_04
+
C81
100u_6.3V_B_A
C689
0.1u_10V_X7R_04
C667
0.1u_10V_X7R_04
C80
10u_10V_Y 5V_08
C624
0.1u_10V_X7R_04
C76
*10u_10V_Y 5V_08
J_DIMM2B
DDR3_SODIMM1_204P
VDD1
75
VDD2
76
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD11
105
VDD12
106
VDDSPD
199
NC1
77
NC2
122
NCTEST
125
VREF_DQ
1
VSS1
2
VSS2
3
VSS3
8
VSS4
9
VSS5
13
VSS6
14
VSS7
19
VSS8
20
VSS9
25
VSS10
26
VSS11
31
VSS12
32
VSS13
37
VSS14
38
VSS15
43
VSS16
44
VSS17
48
VSS18
49
VSS19
54
VSS20
55
VSS21
60
VSS22
61
VSS23
65
VSS24
66
VSS25
71
VSS26
72
VSS27
127
VSS28
128
VSS29
133
VSS30
134
VSS31
138
VSS32
139
VSS33
144
VSS34
145
VSS35
150
VSS36
151
VSS37
155
VSS38
156
VSS39
161
VSS40
162
VSS41
167
VSS42
168
VSS43
172
VSS44
173
VSS45
178
VSS46
179
VSS47
184
VSS48
185
VSS49
189
VSS50
190
VSS51
195
VSS52
196
G2
GND2
G1
GND1
VTT2
204
VTT1
203
VREF_CA
126
RESET#
30
EVEN T#
198
VDD13
111
VDD14
112
VDD16
118
VDD15
117
VDD17
123
VDD18
124
C616
2.2u_6.3V_X5R_04
C77
10u_10V_Y 5V_08
C 682
0.1u_10V_X7R_04
C79
10u_10V_Y 5V_08
J_DIMM2A
DDR3_SODIMM1_204P
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12/BC#
83
A13
119
A14
80
A15
78
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
BA0
109
BA1
108
RAS#
110
WE#
113
CAS#
115
S0#
114
S1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
SDA
200
SCL
202
SA1
201
SA0
197
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
ODT0
116
ODT1
120
BA2
79
DIMM_C A_VREF_B
R423
10K_04
C687
0.01u_16V_X7R_04
C681
0.1u_10V_X7R_04
C613
0.1u_10V_X7R_04
C621
4.7u_6.3V_X5R_04
C672
1u_6.3V_Y 5V_04
R439
1K_1%_04
1.5V
VDD SPDB
0.75V
1.5V
0.75V
3VS
1.5V
M_C AS_B_N
3
M_DATA_B[63:0]
2
3VS
VDDSPDB
M_R AS_B_N
3
CK_M_CH1_0_DN
3
M_SCS_B_N0
3
SCLK
7,9,12,16,19,20,34,37,38
M_MAA_B[15:0]
3
M_DQS_B_DP[7:0]
2
CK_M_CH1_0_DP
3
M_SCS_B_N1
3
M_WE_B_N
3
CK_M_CH1_1_DN
3
SDATA
7,9,12,16,19,20,34,37,38
M_SCKE_B[1:0]
3
DDR1_DRAMR ST
3
M_SBS_B[2:0]
3
PM_EXTTS_DDR#
7,9
CK_M_CH1_1_DP
3
M_ODT_B[1:0]
3
M_DQS_B_DN[7:0]
2
SO-DIMM_1 is placed farther from
the CPU than SO-DIMM_0
From power 0.75V
DIM0
Layout note:
CHC
CHB
CHA
M_CB_ECC_B[7:0]
Sheet 8 of 52
DDR3 Channel B
SO-DIMM_1
Summary of Contents for X7200
Page 1: ......
Page 2: ......
Page 3: ...Preface I Preface Notebook Computer X7200 Service Manual ...
Page 24: ...Introduction 1 12 1 Introduction ...
Page 52: ...Disassembly 2 28 2 Disassembly ...
Page 55: ...Part Lists Top A 3 A Part Lists Top Figure A 1 Top 黑色 凱碩 藍天 互億 非耐落 非耐落 ...
Page 56: ...Part Lists A 4 Bottom A Part Lists Bottom Figure A 2 Bottom 非耐落 ...
Page 57: ...Part Lists LCD A 5 A Part Lists LCD Figure A 3 LCD ...
Page 60: ...Part Lists A 8 VGA GTX1 A Part Lists VGA GTX1 Figure A 6 VGA GTX1 增加 半卡 半卡 非耐落 ...
Page 114: ...Schematic Diagrams B 54 B Schematic Diagrams ...