Clevo B5100M, Service Manual

Page: 56 / 108

Schematic Diagrams
B - 4 CPU 1/7 (DMI, PEG, FDI)
B.Schematic Diagrams
CPU 1/7 (DMI, PEG, FDI)
Sheet 3 of 53
CPU 1/7
(DMI, PEG, FDI)
PLACE NEAR U19
H17
H8_0D4_4 H10
H8_0D4_4 H18
H8_0D4_4
THERM_VOLT 36
3
2
1
3.3V
PEG_IRCOMP_R
EXP_RBIAS
R221 *10mil_short
CRIT_TEMP_REP# 24
Analog Thermal Sensor
C538 0.1u_10V_X7R_04
C550 0.1u_10V_X7R_04
R429 750_1%_04
C548 0.1u_10V_X7R_04
C547 0.1u_10V_X7R_04
R427 49.9_1%_04
C546 0.1u_10V_X7R_04
C542 0.1u_10V_X7R_04
C543 0.1u_10V_X7R_04
C541 0.1u_10V_X7R_04
C540 0.1u_10V_X7R_04
C549 0.1u_10V_X7R_04
C536 0.1u_10V_X7R_04
C537 0.1u_10V_X7R_04
C539 0.1u_10V_X7R_04
C545 0.1u_10V_X7R_04
PCI E
XP
RES
S --
GRAPHIC
S
DMI
Inte
l(R
) FDI
U40A
PZ98927-3641-01F
DMI_RX#[0]
A24
DMI_RX#[1]
C23
DMI_RX#[2]
B22
DMI_RX#[3]
A21
DMI_RX[0]
B24
DMI_RX[1]
D23
DMI_RX[2]
B23
DMI_RX[3]
A22
DMI_TX#[0]
D24
DMI_TX#[1]
G24
DMI_TX#[2]
F23
DMI_TX#[3]
H23
DMI_TX[0]
D25
DMI_TX[1]
F24
DMI_TX[3]
G23 DMI_TX[2]
E23
FDI_TX#[0]
E22
FDI_TX#[1]
D21
FDI_TX#[2]
D19
FDI_TX#[3]
D18
FDI_TX#[4]
G21
FDI_TX#[5]
E19
FDI_TX#[6]
F21
FDI_TX#[7]
G18
FDI_TX[0]
D22
FDI_TX[1]
C21
FDI_TX[2]
D20
FDI_TX[3]
C18
FDI_TX[4]
G22
FDI_TX[5]
E20
FDI_TX[6]
F20
FDI_TX[7]
G19
FDI_FSY NC[0]
F17
FDI_FSY NC[1]
E17
FDI_INT
C17
FDI_LSY NC[0]
F18
FDI_LSY NC[1]
D17
PEG_ICOMPI
B26
PEG_ICOMPO
A26
PEG_RBI AS
A25 PEG_RCOMPO
B27
PEG_RX#[0]
K35
PEG_RX#[1]
J34
PEG_RX#[2]
J33
PEG_RX#[3]
G35
PEG_RX#[4]
G32
PEG_RX#[5]
F34
PEG_RX#[6]
F31
PEG_RX#[7]
D35
PEG_RX#[8]
E33
PEG_RX#[9]
C33
PEG_RX#[10]
D32
PEG_RX#[11]
B32
PEG_RX#[12]
C31
PEG_RX#[13]
B28
PEG_RX#[14]
B30
PEG_RX#[15]
A31
PEG_RX[0]
J35
PEG_RX[1]
H34
PEG_RX[2]
H33
PEG_RX[3]
F35
PEG_RX[4]
G33
PEG_RX[5]
E34
PEG_RX[6]
F32
PEG_RX[7]
D34
PEG_RX[8]
F33
PEG_RX[9]
B33
PEG_RX[10]
D31
PEG_RX[11]
A32
PEG_RX[12]
C30
PEG_RX[13]
A28
PEG_RX[14]
B29
PEG_RX[15]
A30
PEG_TX#[0]
L33
PEG_TX#[1]
M35
PEG_TX#[2]
M33
PEG_TX#[3]
M30
PEG_TX#[4]
L31
PEG_TX#[5]
K32
PEG_TX#[6]
M29
PEG_TX#[7]
J31
PEG_TX#[8]
K29
PEG_TX#[9]
H30
PEG_TX#[10]
H29
PEG_TX#[11]
F29
PEG_TX#[12]
E28
PEG_TX#[13]
D29
PEG_TX#[14]
D27
PEG_TX#[15]
C26
PEG_TX[0]
L34
PEG_TX[1]
M34
PEG_TX[2]
M32
PEG_TX[3]
L30
PEG_TX[4]
M31
PEG_TX[5]
K31
PEG_TX[6]
M28
PEG_TX[7]
H31
PEG_TX[8]
K28
PEG_TX[9]
G30
PEG_TX[10]
G29
PEG_TX[11]
F28
PEG_TX[12]
E27
PEG_TX[13]
D28
PEG_TX[14]
C27
PEG_TX[15]
C25
Q28
*2N3904
B
E
C
C552 0.1u_10V_X7R_04
U19
*W83L771AWG
VDD
1
D+
2
D-
3
THERM
4
GND
5
ALERT
6
SDATA
7
SCLK
8
C551 0.1u_10V_X7R_04
3.3V
DMI_TXP2 21
DMI_TXP1 21
DMI_TXP0 21
DMI_TXN2 21
DMI_TXN1 21
DMI_TXN0 21
DMI_TXP3 21
DMI_RXN2 21
DMI_RXN1 21
DMI_RXN0 21
DMI_TXN3 21
DMI_RXP2 21
DMI_RXP1 21
DMI_RXP0 21
DMI_RXN3 21
FDI_INT 21
FDI_FSY NC1 21
FDI_FSY NC0 21
DMI_RXP3 21
PEG_RX#2 13
FDI_LSY NC1 21
FDI_LSY NC0 21
PEG_RX7 13
PEG_RX#4 13
PEG_RX5 13
PEG_RX#7 13
PEG_RX#1 13
PEG_RX4 13
PEG_RX#0 13
PEG_RX#3 13
PEG_RX2 13
PEG_RX#6 13
PEG_RX3 13
PEG_RX#5 13
PEG_RX6 13
PEG_RX0 13
PEG_TX3 13
PEG_TX6 13
PEG_RX1 13
PEG_TX#3 13
PEG_TX0 13
PEG_TX#2 13
PEG_TX#5 13
PEG_TX7 13
PEG_TX4 13
PEG_TX#7 13
PEG_TX1 13
PEG_TX#0 13
PEG_TX5 13
PEG_TX#1 13
PEG_TX2 13
PEG_TX#6 13
FDI_TXN1 21
FDI_TXN0 21
PEG_TX#4 13
FDI_TXN5 21
FDI_TXN4 21
FDI_TXN3 21
FDI_TXN2 21
FDI_TXP1 21
FDI_TXP0 21
FDI_TXN7 21
FDI_TXN6 21
FDI_TXP5 21
FDI_TXP4 21
FDI_TXP3 21
FDI_TXP2 21
3.3V 4,12,13,17,19,20,21,23,24,26,28,29,31,32,33,34,37,39,40,41,44
FDI_TXP7 21
FDI_TXP6 21
20 mil
D11 *RB751V
A C
1:2 (4mils:8mils)
cost dowm C990317
PM_EXTTS#_EC 4
On Board DDR3 Thermal Sensor
PROCESSOR 1/7 ( DMI,PEG,FDI )
It applies to Auburndale and Clarksfield discrete graphic designs.
If discrete graphic chip is used for Auburndale, VAXG (GFX core) rail can be connected
to GND if motherboard only supports discrete graphics and also in a common
motherboard design if GFX VR is not stuffed. On the other hand, if the VR is stuffed,
VAXG can be left floating in a common motherboard design (Gfx VR keeps VAXG from
floating).
In addition, FDI_RXN_[7:0] and FDI_RXP_[7:0] can be left floating on the PCH.
FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the Auburndale.
The GFX_IMON, FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and
FDI_INT signals should be tied to GND (through 1K ? % resistors) in the common
motherboard design case. Please not that if these signals are left floating, there are no
functional impacts but a small amount of power (~15 mW) maybe wasted. VAXG_SENSE
and VSSAXG_SENSE on Auburndale can be left as no connect.
DPLL_REF_SSCLK and DPLL_REF_SSCLK# can be connected to GND on Auburndale
directly if motherboard only supports discrete graphics. In a common motherboard
design, these pins are driven via PCH (even if Graphics is disabled by BIOS) thus no
external termination is required.
C328
*.1U_16V_04
DEL THERM_ALERT#
C990319
CPU
C321
0.1u_16V_Y 5V_04
C303
0.1u_16V_Y 5V_04
Q27
G711ST9U
OUT
1
VCC
2
GND
3
SMC_CPU_THERM 20,36
SMD_CPU_THERM 20,36
PEG_TX_2
PEG_TX_1
PEG_TX#_3
PEG_TX_4
PEG_TX#_2
PEG_TX#_5
PEG_TX#_7
PEG_TX_6
PEG_TX#_6
PEG_TX#_1
PEG_TX#_4
PEG_TX_7
PEG_TX#_0
PEG_TX_0
PEG_TX_5
PEG_TX_3
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