C H A P T E R
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Catalyst 4500 Series, Catalyst 2948G, Catalyst 2980G Switches Software Configuration Guide
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Release 8.1
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Configuring Switch Acceleration
This chapter describes the Backplane Channel Module and the switch acceleration feature that are
supported on the Catalyst 4000 family supervisor engine.
This chapter consists of these sections:
•
Understanding How Switch Acceleration Works, page 36-1
•
Configuring Switch Acceleration on the Switch, page 36-2
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Backplane Channel Module, page 36-3
Note
For complete syntax and usage information for the commands used in this chapter, refer to the
Catalyst 4500 Series, Catalyst 2948G, and Catalyst 2980G Switches Command Reference.
Understanding How Switch Acceleration Works
The switch acceleration feature provides the following supervisor engine performance benefits:
•
Increased bandwidth between switch engines
•
Full-mesh connectivity between switch engines
•
Reduced internal traffic congestion
The switch acceleration feature is supported on Catalyst 4006 switches with Supervisor Engine II and
on the Catalyst 4000 family Backplane Channel Module. The switch acceleration feature reduces
internal traffic congestion by creating a full-mesh connection between the switch engines (SEs).
Supervisor Engine II has three switch engines that switch traffic to and from the modules and the uplink
ports. This chapter refers to these switch engines as SE1, SE2, and SE3.
•
SE1 handles traffic for Gigabit Ethernet uplink port 1/1 and traffic between modules installed in the
chassis.
•
SE3 handles traffic for Gigabit Ethernet uplink port 1/2 and traffic between modules installed in the
chassis.
•
SE2 switches internal traffic and forwards traffic bound for the uplink ports to the correct SE for that
port.
By default, there is no direct internal connection between SE1 and SE3. As a result, traffic coming in on
SE1 destined for SE3, or vice versa, must go through SE2, which could potentially create congestion.
To avoid such congestion, you can disable the uplink ports and create a direct internal link between SE1
and SE3.
