DS85
1DB1
27
CDB42L56
7. CDB42L56 BLOCK DIAGRAM
Figure 34. Block Diagram
USB
µ controller
CS42L56
S/PDIF Rx
(CS8416)
S/PDIF Tx
(CS8406)
FPGA
Oscillator
(socket)
I
2
C Interface
Reset
Reset
PLL
Tx SRC
(CS8421)
Analog Outputs
(Line + Headphone)
Analog Inputs
(Line + MIC)
External System
I/O Header
Rx SRC
(CS8421)
PSIA I/O Header
USB/
RS232
S/PDIF
Dout
S/PDIF
Din
Summary of Contents for CDB42L56
Page 28: ...28 DS851DB1 CDB42L56 8 CDB42L56 SCHEMATICS Figure 35 CS42L56 Analog I O Schematic Sheet 1 ...
Page 29: ...DS851DB1 29 CDB42L56 Figure 36 S PDIF Digital Interface Schematic Sheet 2 ...
Page 30: ...30 DS851DB1 CDB42L56 Figure 37 PLL oscillator and external I O connections Schematic Sheet 3 ...
Page 31: ...DS851DB1 31 CDB42L56 Figure 38 Microcontroller and FPGA Schematic Sheet 4 ...
Page 32: ...DS851DB1 32 CDB42L56 Figure 39 Power Schematic Sheet 5 ...
Page 33: ...DS851DB1 33 CDB42L56 9 CDB42L56 LAYOUT Figure 40 Silk Screen ...
Page 34: ...DS851DB1 34 CDB42L56 Figure 41 Top Side Layer ...
Page 35: ...DS851DB1 35 CDB42L56 Figure 42 GND Layer 2 ...
Page 36: ...DS851DB1 36 CDB42L56 Figure 43 Power Layer 3 ...
Page 37: ...DS851DB1 37 CDB42L56 Figure 44 Bottom Side Layer ...
