DS773DB1
5
CDB42L55
2 SYSTEM OVERVIEW
The CDB42L55 evaluation platform provides analog and digital interfaces to the CS42L55 and allows for external
DSP and I²C
interconnects to the board. On-board peripherals are powered either from the USB connection or from
an ex5 V supply. On-board voltage regulators provide power to the digital and analog cores of the CS42L55.
The CDB42L55 is configured using Cirrus Logic’s Windows-compatible FlexGUI software to read/write to device
registers.
This section describes the various components on the CDB42L55 and how they are used with the CS42L55.
is a simplified quick connect guide provided for user convenience and may be used to quickly configure
the CS42L55.
describes some of the configurations available for transmitting and receiving au-
provides software configuration details.
provides a descrip-
tion of all stake headers and connectors, including the default factory settings of all jumpers.
provides typical performance plots. The CDB42L55 schematic and layout set is shown in
through
.
2.1
Control Port and Board Configuration
The CDB42L55 evaluation board must be programmed using the Windows compatible software (Cirrus Log-
ic FlexGUI) provided. This software allows the user to program the registers of all the programmable com-
ponents on the board using an I²C interface.
The GUI interfaces with an on-board micro controller through either the USB or the serial port connector.
For a detailed explanation on software controls, refer to
Alternatively, the I²C interface to the CS42L55 can be directly accessed through an I/O header (J109) to
accept external timing and data signals in a user application during system development.
2.2
Power
Power is supplied to the evaluation board through either the +5.0 V test points or the VBUS supply from the
USB. NOTE: The minimum current required for board operation is approximately 300 mA. It may therefore
be necessary to connect the CDB42L55 directly to the USB port on the PC as opposed to a hub or keyboard
port where the current might be limited.
Jumpers connect the CS42L55’s supplies to a low dropout regulated voltage of +1.8 V, +2.5 V or +3.3 V for
VL and +1.8 V or +2.5 V for VLDO, VA and VCP. A selection for a 1.8 V supply from a buck regulator is also
available, providing a more efficient means of evaluating the CS42L55’s performance when powered from
batteries (3 AAA battery connectors are available on the bottom side of the CDB).
For current measurement purposes only, a 1
Ω
ohm series resistor is connected to each supply. The current
is easily calculated by measuring the voltage drop across this resistor. NOTE: The stake headers connected
in parallel with these resistors must be shunted with the supplied jumper during normal operation.
WARNING: Please refer to the CS42L55 data sheet for allowable voltage levels.
2.3
Digital Input
2.3.1
CS8416 S/PDIF Digital Audio Receiver
The CS8416 S/PDIF receiver converts an incoming S/PDIF data input stream into PCM data for the
CS42L55 (through the “Transmit” (Tx) Sample Rate Converter (SRC)).
A complete description of the CS8416 (
) and a discussion of the digital audio inter-
face can be found in the CS8416 data sheet.
Summary of Contents for CDB42L55
Page 25: ...DS773DB1 25 CDB42L55 8 CDB42L55 SCHEMATICS Figure 37 CS42L55 Analog I O Schematic Sheet 1 ...
Page 26: ...26 DS773DB1 CDB42L55 Figure 38 S PDIF Digital Interface Schematic Sheet 2 ...
Page 27: ...DS773DB1 27 CDB42L55 Figure 39 PLL oscillator and external I O connections Schematic Sheet 3 ...
Page 28: ...28 DS773DB1 CDB42L55 Figure 40 Microcontroller and FPGA Schematic Sheet 4 ...
Page 29: ...DS773DB1 29 CDB42L55 Figure 41 Power Schematic Sheet 5 ...
Page 30: ...30 DS773DB1 CDB42L55 9 CDB42L55 LAYOUT Figure 42 Silk Screen ...
Page 31: ...DS773DB1 31 CDB42L55 Figure 43 Top Side Layer ...
Page 32: ...32 DS773DB1 CDB42L55 Figure 44 GND Layer 2 ...
Page 33: ...DS773DB1 33 CDB42L55 Figure 45 Power Layer 3 ...
Page 34: ...34 DS773DB1 CDB42L55 Figure 46 Bottom Side Layer ...
Page 35: ...DS773DB1 35 CDB42L55 10 REVISION HISTORY Revision Changes DB1 Initial Release ...