Cinterion DSB75, Hardware Description

Page: 88 / 96

DSB75 Development Support Board Rev. B1 Hardware Description
Confidential / Released
DSB75_hd_v12 Page 88 of 96 2008-08-26
TO
P
HI
E
R
A
RCHY
L
E
V
E
L
MI
N
I-
U
S
B
S
CHE
M
A
T
IC
1:
1
DS
B
75
GN
D
06.
07.
2004
T
es
t equi
pm
ent
m
eas
ur
e
m
ent
B1
shee
t1
L116
GN
D
L112
C1
3
0
1N
NB
_
C114
22P
VU
S
B_
IN
0R
VE
XT
GN
D
C117
47P
2U2
C116
2 3 4
5
VU
S
B
VS
IM
X1
10
1
3 4
5
6
GN
D
GN
D
ESD A6V 1-5W 6
V112
2
1
VU
S
B
VUSB
GND
GN
D
TP
1
01 -
GN
D
C
125
33P
11
VM
_
S
E0
10
VP
12
VP
_D
AT
26
VR
EF
_
5V
VR
E
G
_
1V8
28
VR
E
G
_
3V3
29
XTAL 1
17
18
XTAL 2
GND4
20
GND5
21
6
OE
15
OT
G
OT
G_
ID
27
7
PSW
RCV
8
3
RES ET
24
VBAT
VI
O
30
VM
9
2
CFG 2 CP_ CAP _A
23
CP_ CAP _B
22
25
CP
_O
UT
DM
13
DP
14 16
DT
G
32
FR
E
Q
S
E
L
4
GND1
GND2
5
19
GND3
1
2
3
GN
D
D
110
IS
P12
61BS
31
AT
X
33
BO
D
Y
1
CFG 1
10U
GN
D
S1
10
GN
D
GN
D
3V
0
C11 0
VB
U
S
_B
GND
8 9
VU
SB
GN
D
GN
D
34 35 36 37 38 39
4
40
5 6 7
24
25 26
27 28 29
3
30 31 32 33 15
16
17 18 19
2
20 21 22 23
8 9
2-
20P
O
L
X1
02
1
10 11
12
13 14
35 36 37 38 39
4
40
5 6 7
25 26 27 28 29
3
30 31 32 33 34 15 16 17 18 19
2
20 21 22 23 24
V
DDL
P
X
101
2
-20P
OL
1
10 11 12 13 14
33R
R
112
R115
10K
CCGND
VUSB _3V3
GN
D
X111
1 2 3 4 5
GN
D
15K
R114
0R
R1
1
6
GND
-
T
P
104
X120
12
R1
1
9
33R
L1
11
0R
10U
C122
CCG ND
C120
100N
GN
D
X
122
12 34
GND
A B C D E
F
AGN D
GN
D
GN
D
73 74 75 76 77 78 79
8
80
9
64 65 66 67 68 69
7
70 71 72 54 55 56 57 58 59
6
60 61 62 63 44 45 46 47 48 49
5
50 51 52 53
35 36 37 38 39 4 40
41 42 43
25 26 27 28 29 3 30 31 32 33 34 15 16 17 18 19 2 20 21 22 23 24
X
100
ST
80
1 10 11 12 13 14
VU
S
B
_I
N
C115
2U2
GND
1
X
121
12
GN
D
2 1 3
4 5 6
15
14
13
12
11
10
9
8
7
6
5
4
3
2
GND
V1
11
ES
D
A
6V
1-
5W
6
NB_
47P
C12 4
L115
47P
C111
22P
C113
VM
IC
VU
S
B_
IN
GN
D
4U7
C121
R
118
C112
47P
R
110
33R
33
R
33R
GN
D
R
111
24
AGND
VE
XT
-
T
P
106
BA
T
T
+
C
X
91-
F
/13M
H
Z
Z
110
13
T
P
105 -
470N
C10 9
G
F E
D C
B A
GN
D
GN
D
VB
U
S
_B
S1
12
1
2
3
C
126
33P
3
V11
0
SI
1413D
H
1 2 5 6
3
4
GN
D
GN
D
S1
11
1
2
47
P
C1
0
1
Si
em
en
s A
G
AP
PR
'D
US
E
R
DA
T
E
GN
D
10
9
8
7
6
5
4
3
2
1
C
100
47
P
C118
47P
GND
TP
1
02 -
T
P
103 -
GN
D
R
120
1K
GN
D
GN
D
GN
D
NB _C 123
47P
V
U
SB
_3V
3
V
DDL
P
L114
R113
15K
R1
1
7
0R
VS
IM
VM
IC
RTS
0
DTR0
RTS
1
CTS
0
CTS
1
DCD0 EM
ER
G
_R
ST
IG
T
MI
CN1
MI
CP
1
MI
CP
2
MI
CN2
EP
N
1
EP
P1
EP
P2
EP
N
2
VS
EN
S
E
US
B
_DN
US
B
_DP
I2
CDA
T
SD
_D
0
SD
_D
1
SD
_D
2
SD
_D
3
SP
IC
S
R
X
D
2_G
P
IO
9
TP
_E
NV
PW
R
_I
N
D
DA
C
_O
U
T
SY
N
C
EM
ER
G_
R
S
T
GND
DM
_B
DP
_B
SD
_
C
LK
I2
CCL
K
US
C5
IS
EN
SE
US
C6
CCCL
K
CCI
O
CCRS
T
CCI
N
US
C4
US
C3
US
C2
US
C1
US
C0
BA
T
T
E
M
P
RX
D1
A
DC2
_
IN
RX
D0
TX
D1
TX
D0
V
CHA
RG
E
CHA
RG
E
G
A
T
E
T
X
D
2_G
PI
O
10
SD
_W
P
SP
ID
I
SD
_D
ET
SD
_C
M
D
A
DC1
_
IN
RI
N
G
0
DS
R0 SD
_D
2
SD
_D
1
A
D
C
1_I
N
SD
_C
M
D
SD
_D
ET
SP
ID
I
SD
_W
P
TX
D2
_G
P
IO
1
0
CHA
RG
E
G
A
T
E
VC
H
AR
G
E
TX
D0
TX
D1
RX
D0
A
D
C
2_I
N
RX
D1
SY
N
C
BA
T
T
E
M
P
US
C0
US
C1
US
C2
US
C3
US
C4
CCI
N
C
CRS
T
CCI
O
CCCL
K
US
C6
IS
E
N
S
E
US
C5
I2
CCL
K
S
D
_C
LK
SD
_D
0
RI
N
G
0
DS
R0
RTS
0
DTR0 RT
S
1
CTS
0
CTS
1
DCD0
EM
ER
G_
R
S
T
IG
T
M
ICN1
MI
CP
1
MI
CP
2
MI
CN
2
EP
N
1
EP
P1
EP
P2
EP
N
2
VS
EN
S
E
US
B
_DN
US
B
_D
P
I2
CDA
T
SD
_D
3
RX
D2
_G
P
IO
9
TP
_E
NV
PW
R
_I
N
D
DA
C
_O
UT
US
B
_DN
US
B
_DP
DM
_B
SP
IC
S
DP
_B
N
B
=
not
m
ount
ed
0R
0R
0R
Figure 51: Schematic sheet 1 – B2B connector, test points, USB interface