CHAINTECH CT-6BJM, User Manual

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Award BIOS Setup Program
31
3-3 Chipset Features Setup
By choosing the Chipset Features Setup option from the CMOS SETUP UTILITY
menu(Figure 3-1), the screen below is displayed. This sample screen contains the
manufacturer's default values for the mainboard .
With the exception of the CPU Setup, all of the above settings have been
determined by the mainboard manufacturer and should not be changed unless
you are absolutely sure of what you are doing. Explanation of the DRAM
timing and chipset features setup is lengthy, highly technical and beyond the
scope of this manual. Below are abbreviated descriptions of the functions
in this setup menu. You can look on the world wide web for helpful chipset
and RAM configuration information including AWARD's web site at
http://www.award.com.
A. DRAM Data Integrity Mode
BIOS automatically detects the presence of ECC DIMMs (72-bit modules). However,
to take advantage of ECC you must set this function at "ECC." If any non-parity
DIMMs are installed, the memory operates in non-parity mode only and this
function must be set at "Non-ECC."
ROM PCI / ISA BIOS (jm69KC0C)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
:Select Item
PU/PD/+/- : Modify
(Shift) F2 : Color
ESC : Quit
F1 : Help
F5 : Old Values
F7 : Load Setup Defaults
Figure 3-4 Chipset Features Setup Screen
SDRAM CAS Latency Time : Auto
SDRAM Precharge Control : Disabled
DRAM Data Integrity Mode : Non-ECC
System BIOS Cacheable : Disabled
Video BIOS Cacheable : Disabled
Video RAM Cacheable : Disabled
8 Bit I/O Recovery Time : 1
16 Bit I/O Recovery Time : 1
Memory Hole At 15M-16M : Disabled
Passive Release : Enabled
Delayed Transaction : Disabled
AGP Aperture Size (MB) : 64
Flash BIOS Protection : Disabled
Hardware Reset Protect : Disabled
Spectrum Spread : Disabled
CPU Host Clock (CPU/PCI) : Default