User Manual
2014 Cervis, Inc.
5
4.0 Electrical
Characteristics
4.1 Power
The module requires a regulated 3.3 VDC source. The module does not provide under-voltage,
over-voltage, or reverse polarity protection so use caution when applying power.
The module transitions between states during normal operation. The integrated PA consumes
the largest amount of power when active. Therefore, transitions to the transmit state will cause
the largest draw on the host supply. It is recommended to provide a large bulk capacitance with
low ESR as close as possible to P1.1 to mitigate host supply drooping during transitions to the
transmit state.
Figure 3 illustrates state transitions vs. current consumption.
Figure 3. State Transitions vs. Current Consumption
4.2 SPI Mode
In SPI mode, P.5 – P1.8 form a SPI slave interface. P1.5 is the input SPI clock generated by the
SPI master (host). The max SCK frequency must be less than 2 MHz. P1.6 is MOSI. P1.7 is
MISO. P1.8 is the input slave select and is active low.
The SPI port is configured for standard SPI Bus Protocol Mode 0. In this mode CPOL (clock
polarity) is 0 meaning that the clock is at a logic low level when idle. CHPA (clock phase) is 1
meaning that data is latched on the rising edge of the clock and changed on the following edge.
The SPI port requires that nSS be asserted at least one bit-time prior to clocking data. nSS may
be released at any time after the last byte has been exchanged. The host must also ensure that
at least one bit-time between consecutive bytes of data is observed.
4.3 UART Mode
In UART mode SCK and nSS (P1.5 and P1.8) are unused and configured as inputs with weak
pull-ups. In this mode UART RX and UART TX (P1.6 and P1.7) provide an asynchronous serial
communications interface. UART RX is configured as an input while UART TX is configured as
an output. The interface is RS-232 compatible with the exception that signaling levels are TTL
logic levels. The port is always configured with 1 start bit, 8 data bits, 1 stop bit, and no parity.
Hardware (RTS and CTS) and software (XON and XOFF) flow control are not utilized. Flow
control is handled by the communications protocol discussed later in this document.
The baud rate of the port can be configured. All standard baud rates from 9600 to 115200 are
supported with less than 4% error. Non-standard baud rates can also be configured, but, not all
requested bauds are possible. Table 2 lists recommended baud rates and associated deviation.
