Canberra 2015A, User Manual

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The OUTPUT of GAIN AMP K2 is ac coupled, through C64, to the fast discriminator
A14. The differentiated signal is also attenuated by 2.5 through resistors R126 and
R127. If the signal exceeds the fast discriminator threshold, A14 pin 2, its OUTPUT
goes to a logic “1" which drives the pulse former Al2d and A8c. If the SCA mode
jumper plug J6 is in the TSCA position, the OUTPUT of A8c is inverted by Al2e and
connected to the true input of A7a. The positive trigger pulse sets A7a’s OUTPUT to a
logic “0”, R146 and C78 prevent A7a from retriggering on multiple inputs. The time
duration A7a remains set is determined by shaping switch S3 (B1 through B3), com-
ponent R143, R144, RV11, RV12, and C76. The OUTPUT of A7a will return to a
logic “1” approximately 200 nanoseconds past the peak of the AMP OUTPUT signal.
Longer SCA OUTPUT delays are obtainable by readjusting RV11 and RV12 for 2
µ
s
and 0.5
µ
s shaping respectively.
When monostable A7a times out and its OUTPUT returns to a logic “1”, A7b pin 9 is
triggered from the positive transition supplied by pulse former A8d and A12b. If en-
abled by flip flop A6b/A6c, monostable A7b generates a 500 nanosecond SCA
OUTPUT pulse. The AMP OUTPUT signal is attenuated by 2.5 and connected to the
LOWER LEVEL and the WINDOW discriminators A13 and A9 respectively. If the
AMP OUTPUT signal crosses the LLD discriminator threshold, its OUTPUT (A13 pin
7) goes to a logic “l ”. Pulse former Al 2a and A6a extracts the positive transition and
sets flip flop A6b/A6c. The OUTPUT of A6c pin 8 is inverted by Al 2f and enables
A7b to generate the internally selectable by J4. The low OUTPUT impedance can 500
nanosecond SCA OUTPUT pulse when triggered. If the AMP OUTPUT signal also
exceeds the WINDOW (
∆
E) discriminator threshold the SCA OUTPUT pulse is
aborted. Flip flop A6b/A6c is reset removing A7b’s enable and clearing A7a ending its
time out. A8a and A8b also monitor the SCA OUTPUT and during each OUTPUT
pulse reset flip flop A6b/A6c and monostable A7a, arming them for the next cycle.
The OUTPUT of monostable A7b is inverted by Q20 with Q21 and Q22 forming a
pair of complementary low OUTPUT impedance emitter followers. The SCA
OUTPUT pulse is brought out through the two 47 ohm resistors R164 and R165 to the
front and rear BNC connectors respectively. The SCA OUTPUT is nom5 volts
(unterminated), however will increase to approxi8 volts (unterminated) is re-
sistor R
B
(3.9 k ohms) is removed.
When in the TSCA mode, monostable A11a is triggered by the fast discriminator
(A14) “OR” Lower Level discriminator A13. The “OR” function is made possible by
diodes D25 and D26. When in the SCA mode, the fast discriminator is not used and
monostable A11a is triggered by the Lower Level discriminator only. Monostable
A11a provides a drive signal for the front panel LOWER LEVEL (E) LED. Its time
constant is approximately 100
µ
s, allowing the LED to be discernible to the eye when
indicating amplifier input events. The front panel LED is a user aid, determining the
noise threshold of both the fast and LLD discriminators.
34
Circuit Description