background image

Cambricon®

 

 

Copyright © 2020 Cambricon Corporation 

   

16 

 

4.3.4.4

 

Other configuration signals 

11Table 4.11 Other configuration signals descriptions 

Signal 

Direction of signal 

Signal description 

MODULE_ID[4:0] 

MLU290-M5 slot ID. MLU290-M5 internal 
default 10 K pull up 

LINK_CONFIG[4:0] 

Serdes link configuration topology, MLU290-
M5 internal default 10 K pull up 

PE_BIF[1:0] 

PCIE interface bit width indication: MLU290-M5 
default 00 
00-1 x16( default) 
01-2 x8 
00-4 x4 
00- Reserved 

PLINK_CAP 

Support of PCIE port protocol

: MLU290-M5 

default value is 0 
0= Only support PCIE protocol (default) 
1= Support other agreements , reserved 

 

4.3.4.5

 

Reserved signals 

The following signals  are  defined in OAM  protocol, but not used  in MLU290-M5,which are 

recommended to NC. 

12Table 4.12 Reserved signal description 

Signal 

Direction of 

signal 

Signal description 

SCALE_DEBUG_EN 

Undefined functions 

DEBUG_PORT_PRSNT# 

Baseboard debug port in position indicator 
signal. NC 

MANF_MODE# 

Undefined functions 

FW_RECOVERY# 

Undefined functions 

Summary of Contents for MLU290-M5

Page 1: ...Cambricon Copyright 2020 Cambricon Corporation 1 MLU290 M5 Intelligent Accelerating Card Product Manual V0 2 0 Preliminary ...

Page 2: ...cifications 5 3 4 Overview of heat dissipation specifications 5 3 5 Overview of interface specifications 6 4 Electrical specifications 7 4 1 Connector pin description 7 4 2 Power supply requirements 10 4 3 Signal description 11 5 Heat dissipation specifications 18 5 1 Heat dissipation instructions 18 5 2 Maximum operating temperature 18 5 3 Slowdown temperature 18 5 4 Shutdown temperature 18 5 5 A...

Page 3: ...er for the products described in this Guide shall be limited Accuracy of information The information provided in this document is owned by Cambricon and Cambricon reserves the right to make any changes to this document information or to any products and services without notice The information contained in this guide and all other information of the Cambricon documents cited in this guide are provi...

Page 4: ...treaties worldwide This guide can not be reproduced reworked modified published uploaded published transmitted or distributed in any way without the prior written permission of Cambricon Except for the customer s right to use this guide information and products according to this guide Cambricon does not grant any other express or implied rights or permits It is doubtful that the Cambricon does not...

Page 5: ...nalysis artificial intelligence reasoning and so on MLU290 M5 supports cambricon adaptive precision training and provides up to 512 TOPs INT8 hashrate to align the data accuracy of training and reasoning business MLU290 M5 provides inter chip high speed interconnection technology CCLINK supports cross system direct connection which can build large scale training clusters easily The new vMLU functi...

Page 6: ...tecture Cambricon MLUv02 Core frequency 1GHz Integer speed INT8 512TOPS Dense Calculation accuracy support INT16 INT8 INT4 FP32 FP16 Video decoding Support Memory capacity 32GB Memory width 4096 bit Memory bandwidth 1024GB s System interface PCI Express 4 0x16 lane reversal supported PCI identifier PCIE Vendor ID 0xCABC PCIE Device ID 0x0290 PCIE Sub Vendor ID xCABC 0 PCIE Sub System ID 0x0012 CCL...

Page 7: ...ifications MLU290 M5 Intelligent Accelerating Card power specifications 3Table 3 3 MLU290 M5 Power Supply Specifications Specification indicators Note Input voltage DC54V 5 6 48 A 5 Electrical data peak processing EDPp 1 6X TDP 2ms 1 5X TDP 5ms 1 2X TDP 10ms 1 1X TDP 20ms 3 4 Overview of heat dissipation specifications MLU290 M5 Intelligent Accelerating Card heat dissipation specifications 4Table ...

Page 8: ...ting Card interface specifications 5Table 3 5 MLU290 M5 Interface Specification Interface Note PCIE Base address PF 1 64 bit BAR0 256MB prefetchable BAR2 256MB prefetchable BAR4 256MB prefetchable VF 4 64 bit BAR0 256MB prefetchable BAR2 256MB prefetchable BAR4 256MB prefetchable SMBus 8bit address 0 x8E Write 0x8F Read ...

Page 9: ...to the main board through this connector and the connector pin area is divided as follows 1Figure 4 1 Connector pin area division The connector pins are shown in the following table 1Table 4 1 MLU290 M5 connector arrangement of pin 0 Signal Direction of signal Signal description Voltage PWR_54V I MLU290 M5 power input pin which support 40V 60V power supply 40V 60V PVREF 1 0 O MLU290 M5 JTAG interf...

Page 10: ..._D I O I2C data signal MLU290 M5 works in slave mode 3 3V I2C_SLV_CLK I I2C clock signal MLU290 M5 working in slave mode 3 3V I2C_SLV_ALERT O I2C alarm signal MLU290 M5 works in slave mode 3 3V UART_TXD O MLU290 M5 MCU UART serial port output 3 3V UART_RXD I MLU290 M5 MCU UART serial port input 3 3V JTAG0_TRST I MLU290 M5 JTAG0 TRST reset signal 1 8V JTAG0_TMS I MLU290 M5 JTAG0 TMS mode selection ...

Page 11: ...0 L3 level TDP power consumption reduced to 200 W 3 3V THERMTRIP O MLU290 M5 over temperature alarm which will trigger MLU290 M5 automatically shut down please check the chassis fault such as fan fault and then restart the device low level effective 3 3V LINK_CONFIG 4 0 I Serdes link configuration topology MLU290 M5 internal default 10 K pull up 3 3V PE_BIF 1 0 O Indication of PCIE interface bit w...

Page 12: ...telligent Accelerating Card is able to reduce power consumption adjustment for transient power changes above the µs level the power regulator can support power fluctuations within the ms level e g 1 2 x TDP 4 Table 4 4 MLU290 M5 EDPp Specification EDP Duration 1 6 TDP 2 ms 1 5 TDP 5 ms 1 2 TDP 10 ms 1 1 TDP 20 ms 4 2 3 HSC protection circuit MLU290 M5 Intelligent Accelerating Card input voltage is...

Page 13: ...elligent Accelerating Card power on normally with DC 54V voltage the HOST_PWRGD signal is sent out after the reference clock 156 25MHz is stable Detailed timing sequence is as follows 54V HOST_PWRGD AUX_156M_REFCLK 4s 100ms 3Figure 4 3 Power on Timing Sequence 4 3 Signal description 4 3 1 Clock signal AUX_156M_REFCLKp n receiving support LVPECL LVDS CML HCSL and other common differential level sig...

Page 14: ...AC coupling capacitors are placed on the baseboard and the value range is 176nF 265nF 220nF recommended The placement position reference diagram is as follows Mirror Mezz connector MLU290 CPU Switch TX RX RX TX MezzCrad BaseBorad 220nF 220nF 4Figure 4 4 PCIE AC Coupled Capacitance PE_REFCLK reference clock shall meet the requirements of PCIE GEN4 0 specification phase noise jitter should be less t...

Page 15: ... of signal Signal description SERDES_4Tp n 15 0 O CCLINK4 15 0 transmit signal SERDES_4Rp n 15 0 I CCLINK4 15 0 receiving signal SERDES_5Tp n 7 0 O CCLINK5 7 0 transmit signal SERDES_5Rp n 7 0 I CCLINK5 7 0 receiving signal SERDES_6Tp n 15 0 O CCLINK6 15 0 transmit signal SERDES_6Rp n 15 0 I CCLINK6 15 0 receiving signal SERDES_7Tp n 15 8 O CCLINK7 15 8 transmit signal SERDES_7Rp n 15 8 I CCLINK7 ...

Page 16: ...dor ID 0xCABC 31 16 Sub System ID 0x0042 PCIE _negotiated_speed 0xA2 RO Display PCIE negotiation rate e g 0 x 04 indicate gen4 16GT s PCIE_negotiated_link_width 0xA3 R O Display PCIE negotiation width e g 0 x16 means X16 Type of card 0xF0 RO Display card type Manufacturer 0xF1 RO Display equipment manufacturer number Hardware version number 0xF2 RO Display hardware version number Firmware version ...

Page 17: ...tion Signal MLU290 M5 Intelligent Accelerating Card provides two power configuration pins PWRBRK and PWRRDT 1 0 PWRBRK is based on the current power consumption and responses fast When low level is effective it is reduced to 1 4 of the current power consumption PWRRDT 1 0 is a hardware implementation mode of power capping which can set 4 types of TDP power consumption 350 W 300W 250W 200 It is rec...

Page 18: ...n MLU290 M5 default 00 00 1 x16 default 01 2 x8 00 4 x4 00 Reserved PLINK_CAP O Support of PCIE port protocol MLU290 M5 default value is 0 0 Only support PCIE protocol default 1 Support other agreements reserved 4 3 4 5 Reserved signals The following signals are defined in OAM protocol but not used in MLU290 M5 which are recommended to NC 12Table 4 12 Reserved signal description Signal Direction o...

Page 19: ...Cambricon Copyright 2020 Cambricon Corporation 17 TEST_MODE I Test mode NC RFU Reserved pin NC Suspension pin ...

Page 20: ...p of MLU290 M5 below 95 5 3 Slowdown temperature Slowdown temperature means the temperature point which the IPU frequency is reduced The slowdown temperature of MLU290 M5 is 97 5 4 Shutdown temperature Shutdown temperature means the temperature point which the power is cut off The shutdown temperature should not be triggered during normal operation and the system may have a catastrophic damage whe...

Page 21: ...r under main temperature conditions is shown in the table below 51Figure 1 Minimum air volume requirement VS Air inlet temperature table for MLU290 M5 Air inlet temperature Radiator Minimum Air Volume Requirements CFM 25 35 30 40 35 50 40 70 45 110 51Figure 1 Minimum air volume requirement vs Air inlet temperature It is recommended to use MLU290 M5 Intelligent Accelerating Card in green area ...

Page 22: ...litate the rapid integration of the system NeuWare also provides a range of tools including application development function debugging performance tuning etc Among them application development tools include machine learning library runtime library compiler model retraining tool and specific field such as video analysis field SDK function debugging tools can meet different levels of debugging requi...

Page 23: ...ful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be require...

Reviews: