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Operation of the Card
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01270146.doc
Blue Chip Technology Ltd.
Timer Initialisation
Before the DAC section can be operated IN ANY MODE Timers 0 and 1 must
be configured. To do this, follow this sequence of writing to the timer registers
Output hex 0 to control register (base + 0).
This disables timers 0 and 1.
Read base + 0. This resets the internal state machine logic.
Output hex 34 to the timer control register (base + 11). This sets timer
0 into mode 2.
Output 3 to timer 0 count register (base + 8). This writes 3 into the
LOW 8 bits of the 16 bit counter register.
Output 0 to timer 0 count register (base + 8). This writes 0 into the
HIGH 8 bits of the 16 bit counter register.
Output hex 78 to the timer control register (base + 11). This sets timer
1 into mode 4.
Output hex 1 to timer 1 count register (base + 9). This writes 1 into
the LOW 8 bits of the 16 bit counter register.
Output hex 0 to time 1 count register (base + 9).
Output hex 40 to control register 1 (base + 0).
In BASIC the initialisation sequence would look like this:
10 out (B 0,&h0)
20 dummy% = inp(BASEADD)
30 out (B 11,&h34)
40 out (B 8,&h03)
50 out (B 8,&h00)
60 out (B 11,&h78)
70 out (B 9,&h03)
80 out (B 9,&h00)
90 out(BASEADD,&h40)
Summary of Contents for AOP-12D
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