BenQ PB8250 - XGA DLP Projector, Service Manual

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ADHSYNC – Providing the Horizontal Synchronization signal to AD9882.
ADVSYNC - Providing the Vertical Synchronization signal AD9882.
DDC interface – Providing Digital Display Channel , which include VCC(Pin9) , SCL(Pin15) ,
SDA(Pin12) .
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Analog Flat Panel Interface (ADC Converter) , AD9882
The ADC converter digitizes the input analog RGB data signal from D_SUB and offers designers
Digital Visual Interface (DVI) receiver, then output the digital data streams to Image Processor.
The normal voltage level of analog RGB input signals is about 0.7V , while the ADC digital signal
output to Image Processor is LVTTL level , about 3.3V. The ADC , AD9882 could supports up to
pixel rate at about 140MHZ , which is about SXGA 75HZ analog input signal(DVI resolutions
up to SXGA 60Hz) . There are some other interface signals related to AD9882
SOGIN – Sync On Green input from Image Processor , the signal enable the PB8250 support the
very special VGA input signal .
GCOAST – Input signal from Image Processor , the signal enable the PB8250 support the
Machintosh analog input format .
GCLK – Output to Image Processor as Pixel Clock , providing the reference clock for Image
Processor .
GHS – Providing the Horizontal Synchronization signal to Image Processor .
GVS - Providing the Vertical Synchronization signal to Image Processor .
GRE, GGE, GBE – Digital data stream to Image Processor which is higher than SXGA 75HZ .
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Image Processor (PW166)
The most important IC is the image Processor , here below list its main function
- Supporting input digital data stream up to UVGA and output digital data up to SXGA
- Two input port , which are Graphic port ( VGA format ) and Video port ( video
decoder
format ) .
- Frame rate conversion , the output frame rate is independent from the input frame rate and the
most important feature of the Image Processor is memory inside , there is no need of external
memory for frame rate convertion.
- Up and Down scaling of different input resolution , ensure the same output image size.
- Providing Bitmap OSD picture , which if more fancy than normal OSD chip.
- On chip Microprocessor
The Image Processor is a highly integrated circuit , it include MCU , Scaler , Memory , OSD. This
will increase the stability of the system. There is some control signals list below
DCLK – pixel clock output to DMD driver BD , provided as a reference clock for DMD driver
DVS – Vertical synchronization signal output to DMD BD , provided as Vertical reference signal
for DMD driver.
DHS – Horizontal synchronization signal output to DMD BD , provided as Horizontal reference
signal for DMD driver.
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