BENDIXKing KY 96A, Maintenance Manual

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B
KY 96A, KY 97A
Rev 5, Apr 2003 MM 006-05674-0005.dwd Page 4-2
It proceeds through the low pass filter which attenuates all audio frequencies above
2.5 kHz. The audio signal is fed through the volume control to the integrated circuit
audio pre-amplifier. Its output will provide more than 100 milliwatts to a headphone,
or to an external audio mixer/amplifier.
An optional 4 ohm audio amplifier provides 4 watts on the 13.75 V units and 8 watts
on the 27.5 V units.
4.2.2 Transmitter/ Modulator
The transmitter block diagram is shown in Figure 4-2 . In the transmit mode, the VCO
feeds a signal to the transmitter of the frequency selected in the “USE” display window
on the front panel. The signal is amplified by the broadband transmitter to the 5 watts
level and fed through the elliptic function 3 section low pass filter to the antenna.
Modulation is applied to the power amplifier by series modulating the 27.5 volt line
(13.75 for KY 97A) with mic audio. A small amount of mic audio is also fed to the re-
ceiver audio amplifier for sidetone.
4.2.3 Stabilized Master Oscillator
The stabilized master oscillator (SMO) I103 generates the RF drive for the transmitter
as well as the local oscillator for the receiver. The SMO synthesizes frequencies that
are referenced to a 25 kHz signal derived from a 3.975 MHz crystal oscillator. Receive
and transmit codes are fed to the synthesizer by the microprocessor (uP) and repre-
sent the frequency indicated in the “USE” window on the front panel.
4.2.4 Microprocessor and Display
Refer to microprocessor block diagram shown in Figure 4-3 . The microprocessor (uP)
contains 4 k bytes of permanent Read Only Memory (ROM) for program instruction. A
32 byte non-volatile memory is used externally for frequency information storage. The
uP receives a 3.975 MHz clock signal from the synthesizer PLL IC which is derived
from a 3.975 MHz crystal.
The uP sends a serial 24 bit code to the synthesizer PLL IC (last 20 bits used) to de-
termine the reference divide ratio. A serial 24 bit code (last 20 bits used) is also sent
to determine the divide ration of the “USE” frequency (when changed).
The increment/decrement switches send three pulses to the uP (up, pulse, down) in a
specific sequence to provide the code and validity check for increment and decrement
operations.
Display dimming controls are read through an analog to digital converter allowing the
aircraft lighting bus to dim the display.
The LCD display viewing angle is controlled by I801, which controls the display bias,
thereby controlling the display viewing angle based on inputs from R755, R802, and
Q803.