BeagleBoard BeagleBone AI-64, System Reference Manual

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Chapter 5. BeagleBone AI-64 High Level
Specification
BeagleBone AI-64 Key Components figure below shows the high level block diagram of BeagleBone
AI-64 board surrounding TDA4VM SoC.
BeagleBone AI -64
oo
Ex
pa
ns
io
n H
ea
de
r (
BB
B
P8
P
9)
2x
4
6P
in
TDA4VM
SoC
LPDDR4 (4GB)
Q3222PM1WDGTK-U
EEPROM 4Kbit
24FC04HT-I/OT
Micro SD
YL004-030-001
MCU_RGMII
1x RJ45 w/
Magnetics
DDR0
MMC1
CSIRX1
Mini DP Conn
3VM11201-D730-7H
MMC2
JTAG
Tag-Connect
10Pin
Crystal
19.2MHz
WKUP_OSCO
PMIC
WKUP_I2C0
USB3.0 HUB
TUSB8041
1 to 4
Expansion Header
P9
USB2.0_HS_1
USB1
SERDES3(2L)
USB0
USB TYPE C
5V 3A Only
USB3.0
Power Input 1
Power MUX
TPS2121
4.5A MAX
Supply
Boot Mode Configuration
Pull-Up Pull-Down Resistor
SYS_BOOTMODE
MCU_BOOTMODE03
BUCK REG
(3.3V)
LM5141RGET
SERDES2 (1L)
3.3V
32b
4b
USB_HS
Timer
IIC
PWM
MCASP
UART
Boot Mode
Button
Ethernet PHY
DP83867CR
CSI1 Conn
(RPi) 22Pin
4 Lane
SPI
Dual
USB3.0 Type A
PCIe M.2 Conn (Key E)
AS0BC27-S40BE-7H
VSYS_5V0
USB3.0 Type A
MCU_BOOTMODE
UART1
MCASP10
SERDES4_TX
DP0(4L)
DP0_AUX
DC Jack
& BBB P9
5V Only
Power Input 2
USB3.0_SS_2
USB3.0_SS_1
USB2.0_HS_2
USB2.0_HS_3
eMMC (16GB)
EMMC16G-TB29-PZ90
MMC0
USB2.0_HS_4
8b
Buffer
SN74LVC2G241
Debug UART
Pin Header
Crystal
22.5792MHz
WKUP_UART0
MCU_ADC0
OSC1
USB_HS
5V
SERDES1 (2L)
PCIe 1(2L)
MCU_SPI1
DSI-TX
DSIConn (RPi)
22Pin
4 Lane
MCU_TIMER_IO1
MCU_UART0
MCU_I2C1
Power
M
CU
m
ikr
oB
US
He
ad
er
2x
8
P
in
1.
27
m
m
5x LEDs GPIOs
Reset Button
SYS_BOOTMODE6
Power Button
MCU_PORz
GPIO
5V
I2C0
MCU_ADC1
Buffer
SN74LVC2G241
Debug UART
Pin Header
UART0
CSIRX0
CSI0 Conn
(RPi) 22Pin
4 Lane
GPIO
USB_SS
USB_SS
Figure 18. BeagleBone AI-64 Key Components
5.1. Processor
BeagleBone AI-64 uses TI J721E-family TDA4VM system-on-chip (SoC) which is part of the K3
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