8
2IQEC2/43798 Manual
B&B Electronics -- PO Box 1040 -- Ottawa, IL 61350
PH (815) 433-5100 -- FAX (815) 433-5105
Software Registers
Flag Register (Read Data Address)
The FLAG register is a read-only register that holds the
status information of the counters and can be read out on the data
bus. To read the FLAG byte for any axis, read the control address
of that axis.
FLAG Byte Defined
7 6 5 4 3 2 1 0
BT: Borrow toggle flip-flop.
Toggles every time CNTR underflows
CT: Carry toggle flip-flop.
Toggles every time CNTR overflows
CPT: Compare toggle flip-flop.
Toggles every time PR equals CNTR.
S: Sign flag. Set to 1 when CNTR underflows.
Reset to 0 when CNTR overflows
E: Error flag. Set to 1 when excessive noise is present at
the count inputs in quadrature mode. Irrelevant in non-
quadrature mode.
U/D': Up/Down flag. Set to 1 when counting up
And reset to 0 when counting down
IDX: Index. Set to 1 when selected index input is at active
level.
0: Not used. Always reset to 0.
Reset and Load Signal Decoders (Write to Control Address)
The following functions can be performed by writing to the
control address for that axis. Note that bits 5 and 6 define the
register and should always be zero when writing to the RLD register.
RLD Byte Defined
7 6 5 4 3 2 1 0
X
0
0
X
X
X
X
0
NOP
X
0
0
X
X
X
X
1
Reset BP
X
0
0
X
X
0
0
X NOP
X
0
0
X
X
0
1
X Reset CNTR
X
0
0
X
X
1
0
X Reset BT, CT, CPT, S
X
0
0
X
X
1
1
X Reset E
X
0
0
0
0
X
X
X NOP
X
0
0
0
1
X
X
X Transfer PR to CNTR
X
0
0
1
0
X
X
X Transfer CNTR to OL
X
0
0
1
1
X
X
X Transfer PR0 to PSC
0
0
0
X
X
X
X
X Select the RLD addressed by X'/Y input
1
0
0
X
X
X
X
X Select both XRLD and YRLD or ZRLD and WRLD together
