Bally 5000 Plus, Manual

Page: 83 / 388

3 . UPU BOARD
C i r cu i t D e s c r i pt i on ( co n t ' d )
DTACK
T h e DTACK c i r cu i t ( U 35 ) gene r a t es a
d a t a t r ans f e r s i gna l for t he E PROM
and RAM c h i ps and I /O func t i ons on
t he
s y s t em bus . T h i s makes t hese
dev i ce s 68000 compa t i b l e . T h e 68000
c h i ps
gene r a t e t he DTACK
i n t e r na l l y .
T h e a d d r ess s t robe ( AS ) s i gna l
gene r a t ed by so f t wa r e a n d t he 8 MHz
s i gna l
con t r o l t he I n t e r na l t i m i ng
for t he DTACK gene r a t o r ( U35 ) .
T h e J 1 1 J um p e r p r o v i de s 2 wa l t
s t a t e s
( r a t e m i c r op r ocessor
r ece i ves DTACK ) . J 1 1 I ns t a l l ed
p r ov i des t he needed 0 wa l t s t a t e .
The m i c r o p r ocessor sends t he l owe r
da t a s t robe ( L DS ) s i gna l ( U 1 , p i n
8 ) and t he upper d a t a s t r obe ( UDS )
s i gna l ( U 1 p i n 7 ) t o U45 . U45
p r ov i des a s i gna l t o U 3 5 at p i n 1 3 .
T h i s s i gna l
� e s t he da t a I s
va l i d when DTACK ( U 35 p i n 1 9 )
r e t u r n s t o t he m i c r o p r ocessor ( U 1
p i n 1 0 ) .
DTACKB ( f r om U 2 2 ) a t U 35 p i n 7 a n d
DTACKA ( f r om U 2 3 ) a t U 35 p i n 8 p a s s
t h rough U35 .
I n t e r r u p t Cyc l e
T he l ACK s i gna l a t U 3 5 p i n 9 h a l t s
U35 f r om send i ng DTACK u n t l I t he
I n t e r r up t
cyc l e a s been
acknow l edged .
3-26
NOT E S