3 .
t.4PU
BOARD
Theo r y of Ope r a t i on
T h e m i c r o p r oc e s s i ng un i t ( MP U ) boa r d i s t h e ma i n boa r d o f t h e s y s t em .
T h e Sound
boa r d and t h e I /O boa r d r e l y on t h e s i g n a l s gene r a t e d by t h e MPU boa r d for t he i r
ope r a t i on . T h e s i gn a l s a n d supp l y vo l t a ges r e qu i r ed f o r i n t e g r a t e d o p e r a t i on o f
t h e MPU boa r d , Sound boa r d ,
a n d I /O boa r d a r e t r a n sm i t t e d b e t ween t h ese boa r d s
us i ng t h e B a c k p l a ne boa r d .
R E S E T
H A LT
RESET
CIRCU IT
HALT
MPU BLOCK D I AGRAM
V M E B U S
COM PAT I B L E
D A T A B U S
A D D R E SS B U S
S A F E
M E MORY
MEMORY
RAM
LATCH
DECO D E R
CLK
1 6 M H z
DATA B U S
A D D R E S S B U S
ROM
RAM
3
.
6 8 6 8 4 M H z
D A T A B U S
A D D R E S S B U S
M I C ROPROCESSOR
68,000
D U A RT
I
DUART
2
INTE R R U PT
PRIORITY
D TACK
GENERATOR
( P A L )
Fig .
3 - 4
C L K
P I A
( PAL I
C O N T R O L B U S
V I A
R TC
3- 1 1
Summary of Contents for 5000 Plus
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Page 361: ...1 5 APPEND I CES APPEND I X 4 Co i n Mechan i sm I nc 1 5 6...
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Page 383: ...APPEND I X 6 Ser v i ce Su i l e t i ns 1 5 APP END I CES 1 5 1 2...
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