IMSPM01 SERIAL PORT MODULE CONFIGURATION
JUMPER CONFIGURATION
A - 4
I-E96-417A
®
Jumpers JP3/JP5
Jumpers JP3 and JP5 are for the request to send (RTS) hand-
shaking lines of the RS-232C serial ports: JP3 for port 1 and
JP5 for port 2. These are input lines to the SPM module that
signal a request from a DTE device to transfer data. When the
serial port module is connected to equipment that does not
support the RTS lines, place a jumper across pins 2 and 3 of
JP3 and JP5. This causes each serial port interface circuit (i.e.,
asynchronous communication interface adapter) to be contin-
uously enabled. For applications requiring the serial port mod-
ule to monitor the RTS signal, these lines can be enabled by
placing jumpers across pins 1 and 2 of JP3 and JP5.
Figure
shows the location of JP3 and JP5.
NOTE: When JP3 and JP5 are configured to provide a continuous
enable signal to their respective asynchronous communication inter-
face adapter (ACIA) (i.e., jumpers across pins 2 and 3), +15 volts is
tied through a resistor to provide the proper logic state to enable the
ACIA circuit. With the jumpers in this position, the RTS input lines
are physically disconnected from P3. They are
not, however, dis-
connected from the faceplate connector. When connecting equip-
ment to the faceplate connector, these lines must
not be grounded
or forced to other voltage levels that would change the logic state
and disable the ACIA circuit.
Jumpers JP4/JP6
Jumpers JP4 and JP6 are for the data terminal ready (DTR)
handshaking lines of the RS-232C serial ports: JP4 for port 1
and JP6 for port 2. These are inputs to the serial port module.
It uses this signal to verify that a DTE device is connected and
that a communication link is to be maintained. The jumper
connections depend on whether the equipment being con-
nected to a port provides the DTR handshaking signal or not.
When the SPM module is connected to equipment that does
not support the DTR lines, place a jumper across pins 2 and 3
of JP4 and JP6. This causes each ACIA circuit to be continu-
ously enabled. For special applications, these lines can be
enabled by placing jumpers across pins 1 and 2 of JP4 and
JP6. If port 1 (diagnostic port) is not used, a jumper is not
required for JP4. Figure
shows the location of JP4 and
JP6.
NOTE: When JP4 and JP6 are configured to provide a continuous
enable signal to their respective ACIA circuit (i.e., jumpers across
pins 2 and 3), +15 volts is tied through a resistor to provide the
proper logic state to enable the ACIA circuit. With the jumpers in this
position, the DTR input lines are physically disconnected from P3.
They are
not, however, disconnected from the faceplate connector.
When connecting equipment to the faceplate connector, these lines
must
not be grounded or forced to other voltage levels that would
change the logic state and disable the ACIA circuit.
