When Enabled, read to the AGP (Accelerated Graphics Port) are executed with one-wait
states.
4
4
-
-
1
1
3
3
B
B
B
I
I
I
O
O
O
S
S
S
S
S
S
e
e
e
t
t
t
u
u
u
p
p
p
3
3
.
.
6
6
I
I
n
n
t
t
e
e
g
g
r
r
a
a
t
t
e
e
d
d
P
P
e
e
r
r
i
i
p
p
h
h
e
e
r
r
a
a
l
l
s
s
CMOS Setup Utility - Copyright (C) 1984 - 1999 Award Software
Integrated Peripherals
On-Chip IDE Chanel0
Enabled
Item Help
On-Chip IDE Chanel1
Enabled
IDE Prefetch Mode
Enabled
Menu Level
Ø
Primary Master PIO
Auto
Primary Slave PIO
Auto
Secondary Master PIO
Auto
Secondary Slave PIO
Auto
Primary Master UDMA
Auto
Primary Slave UDMA
Auto
Secondary Master UDMA
Auto
Secondary Slave UDMA
Auto
Init Display first
PCI Slot
IDE HDD Block Mode
Enabled
Onboard FDD Controller
Enabled
Onboard Serial Port 1
Auto
Onboard Serial Port 2
Auto
UART 2 Mode
Standard
IR Function Duplex
Half
TX, RX inverting enable
No, Yes
Onboard Parallel Port
378/IRQ7
Onboard Parallel Mode
Normal
ECP Mode Use DMA
3
Parallel Port EPP Type
EPP 1.9
Onboard Legacy Audio
Enabled
Sound Blaster
Disabled
SB I/O Base Address
220H
SB IRQ Select
IRQ 5
SB DMA Select
DMA 1
MPU-401
Enabled
MPU-401 I/O Address
330-333H
Game Port (200-207H)
Enabled
On-Chip IDE Channel 0/1
The chipset contains a PCI IDE interface with support for two IDE channels. Select
Enabled to activate the primary IDE interface. Select Disabled to deactivate this interface
.
4
4
-
-
1
1
3
3
Summary of Contents for KT133BL
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