AXIOMTEK SHB211 Series, User Manual

Page: 49 / 112

SHB211 Socket P Half-Size SBC User’s Manual
AMI BIOS Setup Utility
43
z CPU Configuration
This screen shows the CPU Configuration, and you can change the
value of the selected option.
¾ MPS Revision
Use this item to select MPS (Multi Processor Specification)
Revision 1.1 or 1.4. The default setting is
1.4 .
¾ Hardware Prefetcher
This item automatically analyzes its requirements and
prefetches data and instructions from the memory. When
enabled, the processor’s hardware prefetcher will be
allowed to automatically prefetch data and code for the
processor.
¾ Adjacent Cache Line Prefetch
This item has a hardware adjacent cache line prefetch
mechanism that automatically fetches extra cache line
whenever the processor requests for a cache line. This
reduces cache latency by making the next cache line
immediately available if the processor requires it as well.
The processor will retrieve the currently requested cache