AXIOMTEK AX5420P, User Manual

Page: 19 / 36

AX5420P & AX5425P User ’ s Manual
Register Format and Description
13
C h a p t e r 3
Register Format and Description
3.1 I/O Address Mapping
The AX5425P/AX5420P use some non-consecutive addresses
in I/O space. All registers are 8 bits wide. The base address or
starting address is determined during the installation by CPU
auto setting. This chapter describes each register's format and
functions. Each register can be accessed easily by using direct
I/O instructions of whatever application languages available
(Assembly, Basic, Pascal, C, etc.). Don't operate any other
I/O( NOT LISTED) , or else it happens errors.
Location Function Type
Base AoxC0
Isolated output register for Channels 0 through 7
Write
Base AoxC4 Isolated output register for Channels 8 through
15 Write
Base AoxC0 Isolated input register for Channels 0 through 7 Read
Base AoxC4 Isolated input register for Channels 8 through
15 Read
Base oxDC Clear interrupt and Data don't care Write
Base A2 AUX1 pin control register
Set 1 as an output
Set 0 as an input Write
Base A5
interrupt mask register
Write
Base A7 interrupt status register Read status of AUX Read
Base A0X2a AUX pin data polarity Control register. Set 1 to
Invert the polarity of data Write