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GTX Bank
GTP Interface
Lanes
Number 7Z045
109
FMC
1
GTX0_109
GTX_XDY3
109
SFP
1
GTX1_109
GTX_XDY2
109
Display Port
1/2
GTX2_109
GTX_XDY1
109
SMA
1
GTX3_109
GTX_X0Y0
112
PCI Express x4
0
GTX3_112
GTX_X0Y15
112
1
GTX2_112
GTX_X0Y14
112
2
GTX1_112
GTX_X0Y13
112
3
GTX0_112
GTX_X0Y12
Table 3
– GTX Interface Pin Assignments
2.2.1
GTX Reference Clock Inputs
Each GTX bank has reference clock inputs. One of these reference clock inputs are supplied
by on-board clock sources while two others are supplied from the baseboard. A single
programmable LVDS synthesizer is used to provide variable frequency clock sources to GTX
bank 109. This synthesizer provides reference clock frequencies that support the full range of
line rates. The following figure shows the clock sources provided to the dedicated GTX clock
inputs from the baseboard and the on-board synthesizer.
Figure 3
– GTX Clock Sources on the Zynq 7Z045 Mini-Module Plus Development Board
