MSC Q7-MB-EP6
User Manual
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Pin
Signal name
Pin
Signal name
5
GND
6
ML_Lane 1N
7
ML_Lane 2P
8
GND
9
ML_Lane 2N
10
ML_Lane 3P
11
GND
12
ML_Lane 3N
13
GND
14
GND
15
AUXCH P
16
GND
17
AUXCH N
18
Hot Plug Detect
19
Return for Power
20
+3.3V Power (max 0.5A)
Table 3 Pinout DisplayPort connector X301
3.3
LCD Panel LVDS Interface
JILI30 Connector (X801)
LCD/TFT displays with LVDS inputs can be connected via the JILI30 connector X801.
Two 24 bit LVDS channels are available on this 30-pin header. Single channel and 18bit
displays are also supported using the appropriate cables.
Note: Support of single/dual channel and 18/24 bit will depend on the QsevenTM module
used.
The Supply voltage of the LVDS Signal can be adjusted with a jumper on the X803 header.
The LVDS Signals are multiplexed with the embedded Display Port signals on the Jili
connector. Please contact
appropriate display/backlight inverter and cable sets for your application requirements.
References:
Type:
Hirose MDF76GW-30S-1H(55)
Mating:
Cable PlugMDF76-30P-1C
Pin
Signal name
Function
1
LVDS_A0-
eDP0_TX0-
LVDS Negative data signal (-)
Display Port primary channel data signal pair 0 (-)
2
e
LVDS Positive data signal (+)
Display Port primary channel data signal pair 0 (+)
3
LVDS_A1-
eDP0_TX1-
LVDS Negative data signal (-)
Display Port primary channel data signal pair 1 (-)
4
e
LVDS Positive data signal (+)
Display Port primary channel data signal pair 1 (+)
5
LVDS_A2-
eDP0_TX2-
LVDS Negative data signal (-)
Display Port primary channel data signal pair 2 (-)
6
e
LVDS Negative data signal (-)
Display Port primary channel data signal pair 2 (+)
7
GND
Ground
8
LVDS_A_CLK-
eDP0_AUX-
LVDS Negative clock signal (-)
Display Port primary auxiliary channel(-)
9
LVD
e
LVDS Positive clock signal (+)
Display Port primary auxiliary c)
10
LVDS_A3-
eDP0_TX3-
LVDS Negative data signal (-)
Display Port primary channel data signal pair 3 (-)
