APX-3302 User's Manual (OM110000019A)
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Figure6-24: Output CC cycle and output CC width of slave frame-grabber
/////////////////////////////////////////////////////////////////////////////////////
// Configure CC output (slave boards ch1/ch2) //
/////////////////////////////////////////////////////////////////////////////////////
// Configure output CC of slave board ch1
// Configure output CC cycle of slave board (ch1) as
output CC width + 1.
CCCycle_us = (20*1000) + 1;
// 20.001[ms]
CCWidth_us = 20*1000;
// 20[ms]
AcapSetInfo(hDev_Slave[ch_1], ch_1, ACL_EXP_CYCLE,
-1
, CCCycle_us);
AcapSetInfo(hDev_Slave[ch_1], ch_1, ACL_EXPOSURE,
-1
, CCWidth_us);
// Configure output CC cycle of slave board (ch2) as
output CC width + 1.
CCCycle_us = 20*1000) + 1;
// 20.001[ms]
CCWidth_us = 20*1000;
// 20[ms]
AcapSetInfo(hDev_Slave[ch_2], ch_2, ACL_EXP_CYCLE,
-1
, CCCycle_us);
AcapSetInfo(hDev_Slave[ch_2], ch_2, ACL_EXPOSURE,
-1
, CCWidth_us);
// Enable output CC
AcapSetInfo(hDev_Slave[ch_1], ch_1, ACL_EXP_EN,
-1
, 1);
AcapSetInfo(hDev_Slave[ch_2], ch_2, ACL_EXP_EN,
-1
, 1);
/////////////////////////////////////////////////////////////////////////////////////
// Configure synchronous channel (slave board) //
/////////////////////////////////////////////////////////////////////////////////////
// Configure slave board ch1 as the parent of slave board ch2.
AcapSetInfo(hDev_Slave[ch_2], ch_2, ACL_SYNC_CH, -1, ch_1);
Master board
(ch1)
Synchronous
output
Output width 20 [ms]
Output cycle 100 [ms]
CC1
SYNCLT_OUT
Slave board
(ch1)
SYNCLT_IN
CC1 [slave board
(ch2)]
CC1 [slave board
(ch1)]
Synchronous
output
Synchronous
output
Synchronous
output
By followings, CC output cycle of slave board ch1 must be set as
“CC output width + 1”.
* Both output cycle and width must be set to 1 or more if CC is outputted.
(Cannot output if it is
“0”)
* Outputted cycle must be bigger than output width.
* Cannot get next synchronous request from output CC to finish output cycle period.
Summary of Contents for APX-3302
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