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8393CS-MCU Wireless-09/14
ATmega256/128/64RFR2
3.5 Compatibility to ATmega1281/2561
The basic AVR feature set of the ATmega256/128/64RFR2 is derived from the
ATmega1281/2561. Address locations and names of the implemented modules and
registers are unchanged as long as it fits the target application of a very small and
power efficient radio system. In addition, several new features were added.
Backward compatibility of the ATmega256/128/64RFR2 to the ATmega1281/2561 is
provided in most cases. However some incompatibilities between the microcontrollers
exist.
3.5.1 Port A and Port C
Port A and Port C are not implemented. The associated registers are available but will
not provide any port control. Remaining ports are kept at their original address location
to not require changes of existing software packages.
3.5.2 External Memory Interface
The alternate pin function “External Memory interface” using Port A and Port C is not
implemented due to the missing ports.
The large internal data memory (SRAM) does not require an external memory and the
associated parallel interface. It keeps the system radiation (EMC) at a very small level
to provide very high sensitivity at the antenna input.
3.5.3 High Voltage Programming Mode
Alternate pin function BS2 (high voltage programming) of pin PA0 is mapped to a
different pin. Entering the parallel programming mode is controlled by the TST pin.
3.5.4 AVR Oscillators and External Clock
The AVR microcontroller can utilize the high performance crystal oscillator of the
2.4GHz transceiver connected to the pins XTAL1 and XTAL2. An external clock can be
applied to the microcontroller using the clock input CLKI.
3.5.5 Analog Frontend
The ATmega256/128/64RFR2 has a new A/D converter. Software compatibility is
basically assured. Nevertheless to benefit from the higher conversion speeds and the
better performance some changes are required.
