Atmel ATF16V8B Manual Download

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0364J–PLD–7/05

ATF16V8B/BQ/BQL

15.2

20P3 – PDIP

2325 Orchard Parkway
San Jose, CA 95131

TITLE

DRAWING NO.

REV.

20P3, 20-lead (0.300"/7.62 mm Wide) Plastic Dual
Inline Package (PDIP)

20P3

1/23/04

SEATING PLANE

COMMON DIMENSIONS

(Unit of Measure = mm)

SYMBOL

MIN

NOM

MAX

NOTE

–

5.334

0.381

–

24.892

– 26.924 Note 2

7.620

–

8.255

6.096

–

7.112

Note 2

0.356

–

0.559

1.270

–

1.551

2.921

–

3.810

0.203

–

0.356

–

10.922

0.000

–

1.524

e 2.540 TYP

Notes:

1. This package conforms to JEDEC reference MS-001, Variation AD.
2. Dimensions D and E1 do not include mold Flash or Protrusion.

Mold Flash or Protrusion shall not exceed 0.25 mm (0.010").

Summary of Contents for ATF16V8B

Page 1: ...mmable logic device PLD that utilizes Atmel s proven electrically erasable Flash memory technology All speed ranges are specified over the full 5V 10 range for industrial temperature ranges and 5V 5 for commercial temperature ranges Several low power options allow selection of the best solution for various types of power limited applications Each of these options significantly reduces total system...

Page 2: ...igure 2 1 TSSOP Figure 2 2 DIP SOIC Figure 2 3 PLCC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 I CLK I1 I2 I3 I4 I5 I6 I7 I8 GND VCC I O I O I O I O I O I O I O I O I9 OE 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 I CLK I1 I2 I3 I4 I5 I6 I7 I8 GND VCC I O I O I O I O I O I O I O I O I9 OE 4 5 6 7 8 18 17 16 15 14 I3 I4 I5 I6 I7 I O I O I O I O I O 3 2 1 20 19 9 10 11 12 13 I8 GND I...

Page 3: ...g conditions for extended periods may affect device reliability Note 1 Minimum voltage is 0 6V DC which may under shoot to 2 0V for pulses of less than 20 ns Maximum output pin voltage is VCC 0 75V DC which may overshoot to 7 0V for pulses of less than 20 ns Storage Temperature 65o C to 150o C Voltage on Any Pin with Respect to Ground 2 0 V to 7 0 V 1 Voltage on Input Pins with Respect to Ground D...

Page 4: ...Outputs Open B 10 Com 55 85 mA Ind 55 95 mA B 15 Com 50 75 mA B 15 Ind 50 80 mA BQ 10 Com 35 55 mA BQL 15 Com 5 10 mA BQL 15 Ind 5 15 mA ICC2 Clocked Power Supply Current VCC Max Outputs Open f 15 MHz B 10 Com 60 90 mA Ind 60 100 mA B 15 Com 55 85 mA B 15 Ind 55 95 mA BQ 10 Com 40 55 mA BQL 15 Com 20 35 mA BQL 15 Ind 20 40 mA IOS 1 Output Short Circuit Current VOUT 0 5 V 130 mA VIL Input Low Volta...

Page 5: ...o Non Registered Output 8 outputs switching 3 10 3 15 ns tCF Clock to Feedback 6 8 ns tCO Clock to Output 2 7 2 10 ns tS Input or Feedback Setup Time 7 5 12 ns tH Hold Time 0 0 ns tP Clock Period 12 16 ns tW Clock Width 6 8 ns fMAX External Feedback 1 tS tCO 68 45 MHz Internal Feedback 1 tS tCF 74 50 MHz No Feedback 1 tP 83 62 MHz tEA Input to Output Enable Product Term 3 10 3 15 ns tER Input to O...

Page 6: ... 10 to 90 4 4 2 Output Test Loads Commercial CL includes Test fixture and Probe capacitance 4 5 Pin Capacitance Note 1 Typical values for nominal supply voltage This parameter is only sampled and is not 100 tested Table 4 1 Pin Capacitance f 1 MHz T 25 C 1 Typ Max Units Conditions CIN 5 8 pF VIN 0V COUT 6 8 pF VOUT 0V ...

Page 7: ... 4 7 Preload of Registered Outputs The ATF16V8B s registers are provided with circuitry to allow loading of each register with either a high or a low This feature will simplify testing since any state can be forced into the registers to control test sequencing A JEDEC file with preload is generated when a source file with vec tors is compiled Once downloaded the JEDEC file preload sequence will be...

Page 8: ...patible drivers see input and I O diagrams below Figure 8 1 Input Diagram Figure 8 2 I O Diagram 9 Functional Logic Diagram Description The Logic Option and Functional Diagrams describe the ATF16V8B architecture Eight config urable macrocells can be configured as a registered output combinatorial I O combinatorial output or dedicated input The ATF16V8B can be configured in one of three different m...

Page 9: ...l outputs with OE controlled by the product term will force the software to choose the complex mode The software will choose the simple mode only when all outputs are dedicated combinatorial without OE control The different device types can be used to override the automatic device selection by the software For further details refer to the compiler software manuals When using compiler software to c...

Page 10: ...n input the output enable is permanently disabled Any register usage will make the compiler select this mode The following registered devices can be emulated using this mode 16R8 16RP8 16R6 16RP6 16R4 16RP4 Figure 11 1 Registered Configuration for Registered Mode 1 2 Notes 1 Pin 1 controls common CLK for the registered outputs Pin 11 controls common OE for the reg istered outputs Pin 1 and Pin 11 ...

Page 11: ...11 0364J PLD 7 05 ATF16V8B BQ BQL Figure 11 3 Registered Mode Logic Diagram ...

Page 12: ...hs back to the AND array which makes full I O capability possible Pins 12 and 19 outermost macrocells are outputs only They do not have input capability In this mode each macrocell has seven product terms going to the sum term and one product term enabling the output Combinatorial applications with an OE requirement will make the compiler select this mode The following devices can be emulated usin...

Page 13: ...13 0364J PLD 7 05 ATF16V8B BQ BQL Figure 11 5 Complex Mode Logic Diagram ...

Page 14: ...combinato rial outputs Other macrocells can be either inputs or combinatorial outputs with pin feedback to the AND array Pins 1 and 11 are regular inputs The compiler selects this mode when all outputs are combinatorial without OE control The fol lowing simple PALs can be emulated using this mode 10L8 10H8 10P8 12L6 12H6 12P6 14L4 14H4 14P4 16L2 16H2 16P2 Figure 11 6 Simple Mode Option Note Pins 1...

Page 15: ...15 0364J PLD 7 05 ATF16V8B BQ BQL Figure 11 7 Simple Mode Logic Diagram ...

Page 16: ...SUPPLY CURRENT vs SUPPLY VOLTAGE ATF16V8B BQ TA 25C 25 35 45 55 65 I C C m A 4 50 4 75 5 00 5 25 5 50 SUPPLY VOLTAGE V ATF16V8B ATF16V8BQ OUTPUT SOURCE CURRENT vs SUPPLY VOLTAGE TA 25C 24 22 20 18 16 14 12 10 I O H m A 4 5 4 7 4 9 5 1 5 3 5 5 SUPPLY VOLTAGE V SUPPLY CURRENT vs INPUT FREQUENCY ATF16V8BL BQL VCC 5V TA 25C 0 25 50 75 I C C m A 0 20 40 60 80 100 FREQUENCY MHz ATF16V8B ATF16V8BQL ...

Page 17: ...LY VOLTAGE TA 25 C 0 7 0 85 1 1 15 1 3 4 50 4 75 5 00 5 25 5 50 SUPPLY VOLTAGE V N O R M T P D ATF16V8B BQ ATF16V8BQL NORMALIZED TCO vs SUPPLY VOLTAGE TA 25 C 0 7 0 85 1 1 15 1 3 4 50 4 75 5 00 5 25 5 50 SUPPLY VOLT AGE V N O R M T C O ATF16V8B BQ ATF16V8BQL ...

Page 18: ...18 0364J PLD 7 05 ATF16V8B BQ BQL ...

Page 19: ...0SI ATF16V8B 10XI 20J 20P3 20S 20X Industrial 40 C to 85 C 15 12 10 ATF16V8B 15JC ATF16V8B 15PC ATF16V8B 15SC 20J 20P3 20S 20X Commercial 0 C to 70 C ATF16V8B 15XC ATF16V8B 15JI ATF16V8B 15PI ATF16V8B 15SI 20J 20P3 20S 20X Industrial 40 C to 85 C ATF16V8B 15XI 13 2 ATF16V8B Green Package Options Pb Halide free RoHS Compliant tPD ns tS ns tCO ns Ordering Code Package Operation Range 10 7 5 7 ATF16V...

Page 20: ...ATF16V8BQ 10XC 15 12 10 ATF16V8BQL 15JC ATF16V8BQL 15PC ATF16V8BQL 15SC ATF16V8BQL 15XC 20J 20P3 20S 20X Commercial 0 C to 70 C ATF16V8BQL 15JI ATF16V8BQL 15PI ATF16V8BQL 15SI ATF16V8BQL 15XI 20J 20P3 20S 20X Industrial 40 C to 85 C 14 2 ATF16V8BQ and ATF16V8BQL Green Package Options Pb Halide free RoHS Compliant tPD ns tS ns tCO ns Ordering Code Package Operation Range 15 12 10 ATF16V8BQL 15JU AT...

Page 21: ...re measured at the extreme material condition at the upper or lower parting line 3 Lead coplanarity is 0 004 0 102 mm maximum A 4 191 4 572 A1 2 286 3 048 A2 0 508 D 9 779 10 033 D1 8 890 9 042 Note 2 E 9 779 10 033 E1 8 890 9 042 Note 2 D2 E2 7 366 8 382 B 0 660 0 813 B1 0 330 0 533 e 1 270 TYP COMMON DIMENSIONS Unit of Measure mm SYMBOL MIN NOM MAX NOTE 1 14 0 045 X 45 PIN NO 1 IDENTIFIER 1 14 0...

Page 22: ...A D e eB eC COMMON DIMENSIONS Unit of Measure mm SYMBOL MIN NOM MAX NOTE A 5 334 A1 0 381 D 24 892 26 924 Note 2 E 7 620 8 255 E1 6 096 7 112 Note 2 B 0 356 0 559 B1 1 270 1 551 L 2 921 3 810 C 0 203 0 356 eB 10 922 eC 0 000 1 524 e 2 540 TYP Notes 1 This package conforms to JEDEC reference MS 001 Variation AD 2 Dimensions D and E1 do not include mold Flash or Protrusion Mold Flash or Protrusion s...

Page 23: ...ng Small Outline SOIC B 20S 10 23 03 7 60 0 2992 7 40 0 2914 0 51 0 020 0 33 0 013 10 65 0 419 10 00 0 394 PIN 1 ID 1 27 0 050 BSC 13 00 0 5118 12 60 0 4961 0 30 0 0118 0 10 0 0040 2 65 0 1043 2 35 0 0926 0º 8º 1 27 0 050 0 40 0 016 0 32 0 0125 0 23 0 0091 PIN 1 Dimensions in Millimeters and Inches Controlling dimension Inches JEDEC Standard MS 013 ...

Page 24: ...hin Shrink Small Outline Package TSSOP C 20X 10 23 03 6 60 260 6 40 252 1 20 0 047 MAX 0 65 0256 BSC 0 20 0 008 0 09 0 004 0 15 0 006 0 05 0 002 INDEX MARK 6 50 0 256 6 25 0 246 SEATING PLANE 4 50 0 177 4 30 0 169 PIN 1 0 75 0 030 0 45 0 018 0º 8º 0 30 0 012 0 19 0 007 Dimensions in Millimeters and Inches Controlling dimension Millimeters JEDEC Standard MO 153 AC ...

Page 25: ...JI PI SI XI were obseleted in August 1999 ATF16V8BQL 25 JC PC SC XC JI PI SI XI were obseleted in August 1999 These devices were removed from Section 13 ATF16V8B Ordering Information on page 19 and Section 14 ATF16V8BQ BQL Ordering Information on page 20 2 Green Package options added in 2005 ...

Page 26: ...tmel Operations 2325 Orchard Parkway San Jose CA 95131 USA Tel 1 408 441 0311 Fax 1 408 487 2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH 1705 Fribourg Switzerland Tel 41 26 426 5555 Fax 41 26 426 5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel 852 2721 9778 Fax 852 2722 1369 Japan 9F Tonetsu Shinkawa Bldg 1 24 ...

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