2
0364J–PLD–7/05
ATF16V8B/BQ/BQL
Figure 1-1.
Block Diagram
2.
Pin Configurations
Table 2-1.
Pin Configurations (All Pinouts Top View)
Pin Name
Function
CLK
Clock
I
Logic Inputs
I/O
Bi-directional Buffers
OE
Output Enable
VCC
+5V Supply
Figure 2-1.
TSSOP
Figure 2-2.
DIP/SOIC
Figure 2-3.
PLCC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
I/CLK
I1
I2
I3
I4
I5
I6
I7
I8
GND
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I9/OE
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
I/CLK
I1
I2
I3
I4
I5
I6
I7
I8
GND
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I9/OE
4
5
6
7
8
18
17
16
15
14
I3
I4
I5
I6
I7
I/O
I/O
I/O
I/O
I/O
3
2
1
20
19
9
10
11
12
13
I8
GND
I9/OE
I/O
I/O
I2
I1
I/CLK
VCC
I/O
Summary of Contents for ATF16V8B
Page 11: ...11 0364J PLD 7 05 ATF16V8B BQ BQL Figure 11 3 Registered Mode Logic Diagram ...
Page 13: ...13 0364J PLD 7 05 ATF16V8B BQ BQL Figure 11 5 Complex Mode Logic Diagram ...
Page 15: ...15 0364J PLD 7 05 ATF16V8B BQ BQL Figure 11 7 Simple Mode Logic Diagram ...