9
6255B–ATARM–26-Jun-09
Application Note
6. AT91 System Initialization for a K9F2G08U0M Device
6.1
Clocks
The system is running at full speed, this means 198 MHz for the processor and 99 MHz for the
Bus. The EBI NCS3 is to be assigned for NAND Flash usage.
6.2
PIOs
6.2.1
Standard NAND
Two PIO lines are needed for CE and RDY/BSY. NANDOE (PC0) and NANDWE (PC1) are to
be configured for NAND Flash usage.
Note:
1. Any free PIO can be used for this purpose
6.2.2
“CE don’t care” NAND
One PIO line only is needed, for RDY/BSY. NCS3 has the NANDCS function. On the
AT91SAM9260 the NCS3 is multiplexed with a PIO line allowing standard NAND Flash and “CE
don’t care” device support without any hardware modification.
Note:
1. Any free PIO can be used for this purpose
Table 6-1.
System Configuration
Description
Settings
Register/field
Value
System
PLL frequency
198 MHz
PMC_PLLAR
0x20603F09
Processor / Bus Clock
198 / 99 MHz
PMC_MCKR
0x00000102
EBI Chip Select Assignment
NAND
EBI_CSA
EBI_CS3A
0x8
Table 6-2.
Peripheral Configuration for Standard NAND on AT91SAM9261
Description
Settings
AT91 libV3 Function
NANDOE and NANDWE are
respectively PC0 and PC1
Output
AT91F_PIO_CfgPeriph(AT91C_BASE_PIOC, (AT91C_PC0_SMOE
| AT91C_PC1_SMWE), 0);
PC14 is CE (1)
Output
AT91F_PIO_CfgOutput(AT91C_BASE_PIOC, AT91C_PIO_PC14);
PC15 is RDY/BSY (1)
Input
AT91F_PIO_CfgInput(AT91C_BASE_PIOC, AT91C_PIO_PC15);
Enable PIO clock (1)
AT91F_PIOC_CfgPMC ();
Table 6-3.
Peripheral Configuration for “CE don’t Care” NAND on AT91SAM9260
Description
Settings
AT91 libV3 function
NCS3 is CE
Output
AT91F_PIO_CfgPeriph(AT91C_BASE_PIOC,
AT91C_PC14_NCS3_NANDCS,0);
PC13 is RDY/BSY (1)
Input
AT91F_PIO_CfgInput(AT91C_BASE_PIOC, AT91C_PIO_PC13);
Enable PIO clock (1)
AT91F_PIOC_CfgPMC ();