AT24C16C [DATASHEET]
Atmel-8719D-SEEPROM-AT24C16C-Datasheet_122016
8
Figure 6-5.
Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
Figure 6-6.
Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
Note:
1.
The write cycle time t
WR
is the time from a valid Stop Condition of a Write sequence to the end of the internal
clear/write cycle.
SCL
SDA IN
SDA OUT
t
F
t
HIGH
t
LOW
t
LOW
t
R
t
AA
t
DH
t
BUF
t
SU.STO
t
SU.DAT
t
HD.DAT
t
HD.STA
t
SU.STA
t
WR
(1)
Stop
Condition
Start
Condition
WORDn
ACK
8th bit
SCL
SDA
