
16
ASUS MEL-C User’s Manual
III. HARDWARE SETUP
Motherboard Settings
III. H/W SETUP
4. CPU External (BUS) Frequency Selection (DIP1, 2, 3)
These DIP switches tell the clock generator what frequency to send to the CPU.
These allow the selection of the CPU’s External frequency (or BUS Clock). The
BUS Clock times the BUS Ratio equals the CPU's Internal frequency (the ad-
vertised CPU speed).
MEL-C CPU BUS Frequency Selection
CPU/AGP
PCI BUS
→
→
66MHz
33MHz
ON
123
456789
1
0
ON
123
456789
1
0
83MHz
41MHz
68MHz
34MHz
ON
123
456789
1
0
75MHz
37MHz
ON
123
456789
1
0
5. CPU to BUS Frequency Multiple (DIP7, 8, 9, 10)
These DIP switches set the frequency multiple between the Internal frequency
of the CPU and the External frequency (called the BUS Clock) within the CPU.
MEL-C CPU : BUS Frequency Multiple
8.0x(8/1)
ON
123456
789
1
0
7.5x(15/2)
ON
123456
789
1
0
7.0x(7/1)
ON
123456
789
1
0
6.5x(13/2)
ON
123456
789
1
0
ON
123456
789
1
0
6.0x(6/1)
5.0x(5/1)
ON
123456
789
1
0
4.5x(9/2)
ON
123456
789
1
0
4.0x(4/1)
ON
123456
789
1
0
3.5x(7/2)
ON
123456
789
1
0
ON
123456
789
1
0
3.0x(3/1)
5.5x(11/2)
ON
123456
789
1
0
Set the DIP switches by the Internal speed of your processor as follows:
(BUS Frequency)
(Frequency Multiple)
Intel CPU Model
Speed
Mult
Freq.
DIP1
DIP2
DIP3
DIP7
DIP8
DIP9 DIP10
Celeron (PPGA)
466MHz
7.0x
66MHz
[OFF]
[OFF]
[OFF]
[ON]
[OFF]
[ON]
[OFF]
Celeron (PPGA)
433MHz
6.5x
66MHz
[OFF]
[OFF]
[OFF]
[OFF]
[ON]
[ON]
[OFF]
Celeron (PPGA)
400MHz
6.0x
66MHz
[OFF]
[OFF]
[OFF]
[ON]
[ON]
[ON]
[OFF]
Celeron (PPGA)
366MHz
5.5x
66MHz
[OFF]
[OFF]
[OFF]
[OFF]
[OFF] [OFF]
[ON]
Celeron (PPGA)
333MHz
5.0x
66MHz
[OFF]
[OFF]
[OFF]
[ON]
[OFF] [OFF]
[ON]
Celeron (PPGA)
300MHz
4.5x
66MHz
[OFF]
[OFF]
[OFF]
[OFF]
[ON]
[OFF]
[ON]
Summary of Contents for MEL-C
Page 1: ...R MEL C Socket 370 Motherboard USER S MANUAL ...
Page 56: ...ASUS MEL C User s Manual 56 This page was intentionally left blank IV BIOS SETUP ...
Page 57: ...57 ASUS MEL C User s Manual R SUPPORT CD ...
Page 80: ...ASUS MEL C User s Manual 80 This page was intentionally left blank VII APPENDIX ...