2-14
Chapter 2: BIOS information
ECC Configuration
ECC Mode [Disabled]
Allows you to set the ECC mode. Configuration options: [Disabled] [Basic] [Good]
[Super] [Max] [User]
2.4.3
Chipset
NorthBridge Configuration
DRAM Controller Configuration
Bank Interleaving [Auto]
Allows you to enable the bank memory interleaving. Configuration options: [Disabled]
[Auto]
Channel Interleaving [XOR of Address bit]
Allows you to enable the channel memory interleaving.
Configuration options: [Disabled] [Address bits 6] [Address bits 12]
[XOR of Address bits [20:16, 6]] [XOR of Address bits [20:16, 9]]
MemClk Tristate C3/ATLVID [Disabled]
Allows you to enable or disable MemClk Tri-Stating during C3 and Alt VID.
Configuration options: [Disabled] [Enabled]
Memory Hole Remapping [Enabled]
Allows you to enable or disable memory remapping around memory hole.
Configuration options: [Disabled] [Enabled]
DCT Unganged Mode [Always]
Allows you to select the unganged DRAM mode (64-bit width).
Configuration options: [Auto] [Always]
Power Down Enable [Disabled]
Allows you to enable or disable DDR power down mode.
Configuration options: [Disabled] [Enabled]
C1E Configuration [Disabled]
Enables or disables the CPU Enhanced Halt (C1E) function, a CPU power-saving function
in system halt state. When this item is enabled, the CPU core frequency and voltage will be
reduced during the system halt state to decrease power consumption.
Configuration options: [Disabled] [Enabled]
Advanced Clock Calibration [Disabled]
Adjusts the processor’s overclocking capability. When this item is set to
[Auto]
, the BIOS
automatically adjusts this function. When this item is set to
[All Cores]
, the processor has
the best overclocking performance. When this item is set to
[Per Core]
, the processor’s
overclocking capability is enhanced. Configuration options: [Disabled] [Auto] [All Cores]
[Per Core]
Summary of Contents for M4A77TD PRO U3S6
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