Asus AAEON EPIC-TGH7 User Manual Download

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Chapter 3

–

AMI BIOS Setup

EPIC
Bo

EPIC
-T

Select how robot should compare data read from register, to a value configured below.
Bit offset

Optimal Default, Failsafe Default

Fill bit offset for register, for robot to compare with bit value.
Bit value

Low

Optimal Default, Failsafe Default

High

Fill bit value for robot to compare register-bit with specified offset.
Byte value

Optimal Default, Failsafe Default

Fill a byte value for robot to compare register data with, in hexadecimal. Range: 0

–

FF.

3.6 Setup Submenu: System I/O

Summary of Contents for AAEON EPIC-TGH7

Page 1: ...Last Updated August 8 2022 EPIC TGH7 EPIC Board User s Manual 1st Ed ...

Page 2: ...this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use or for any infringements upon the rights of third parties that may result from its use The material in this document is for product information only and is subject to change without notice While reasonable efforts have been made in the preparation of this document to assure i...

Page 3: ... and Celeron are registered trademarks of Intel Corporation Intel Atom Xeon and Core are trademarks of Intel Corporation IBM PC AT PS 2 and VGA are trademarks of International Business Machines Corporation All other product names or trademarks are properties of their respective owners No ownership is implied or assumed for products names or trademarks not herein listed by the publisher of this doc...

Page 4: ...List Before setting up your product please make sure the following items have been shipped Item Quantity EPIC TGH7 1 Screw Kit 1 If any of these items are missing or damaged please contact your distributor or sales representative immediately ...

Page 5: ...criptions and explanations on the product s hardware and software features if any its specifications dimensions jumper connector settings definitions and driver installation instructions if any to facilitate users in setting up their product Users may refer to the product page on AAEON com for the latest version of this document ...

Page 6: ...ient over voltage 7 Always disconnect this device from any AC supply before cleaning 8 While cleaning use a damp cloth instead of liquid or spray detergents 9 Make sure the device is installed near a power outlet and is easily accessible 10 Keep this device away from humidity 11 Place the device on a solid surface during installation to prevent falls 12 Do not cover the openings on the device to e...

Page 7: ... to the device iii Exposure to moisture iv Device is not working as expected or in a manner as described in this manual v The device is dropped or damaged vi Any obvious signs of damage displayed on the device 18 DO NOT LEAVE THIS DEVICE IN AN UNCONTROLLED ENVIRONMENT WITH TEMPERATURES BEYOND THE DEVICE S PERMITTED STORAGE TEMPERATURES SEE CHAPTER 1 TO PREVENT DAMAGE ...

Page 8: ...on if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions and your local government s recycling or disposal directives Attention Il y a un risque d explosion si la batterie est remplacée de façon incorrecte Ne la remplacer qu avec le même modèle ou équivalent recomma...

Page 9: ...称及含量 AAEON Main Board Daughter Board Backplane 部件名称有毒有害物质或元素铅 Pb 汞 Hg 镉 Cd 六价铬 Cr VI 多溴联苯 PBB 多溴二苯醚 PBDE 印刷电路板及其电子组件外部信号连接器及线材 O 表示该有毒有害物质在该部件所有均质材料中的含量均在 SJ T 11363 2006 标准规定的限量要求以下 X 表示该有毒有害物质至少在该部件的某一均质材料中的含量超出 SJ T 11363 2006 标准规定的限量要求备注此产品所标示之环保使用期限系指在一般正常使用状况下 ...

Page 10: ... Ethers PBDE PCB Other Components X O O O O Wires Connectors for External Connections X O O O O O O The quantity of poisonous or hazardous substances or elements found in each of the component s parts is below the SJ T 11363 2006 stipulated requirement X The quantity of poisonous or hazardous substances or elements found in at least one of the component s parts is beyond the SJ T 11363 2006 stipul...

Page 11: ... 12 2 4 4 LVDS eDP Port Backlight Lightness Control Mode Selection JP1 12 2 4 5 Touch Screen 4 5 8 Wire Selection JP3 12 2 4 6 Auto Power Button Enable Disable Selection JP5 12 2 5 List of Connectors 13 2 5 1 VGA Connector CN1 15 2 5 2 HDMI CN28 16 2 5 3 LVDS eDP CN6 17 2 5 4 LVDS Port Inverter Backlight Connector CN11 19 2 5 5 Mini Card Slot Half Size CN41 20 2 5 6 SATA Port CN4 22 2 5 7 SATA Por...

Page 12: ...Right CN14 35 2 5 22 External 5VSB Input CN10 35 2 5 23 Touch Screen Connector CN21 36 2 5 24 Audio I O Port CN3 39 2 5 25 Nano SIM Card Socket CN39 40 2 5 26 COM Port 1 2 CN45 41 2 5 27 COM Port 3 4 CN46 43 2 5 28 COM Port 5 6 CN47 44 2 5 29 Dual DP Port CN33 45 2 5 30 DDR4 SO DIMM Slot CN40 CN17 46 2 5 31 M 2 B Key Slot 3052 CN42 46 2 5 32 PCIE FPC Connector CN38 47 2 5 33 PCIE x8 Slot CN16 48 C...

Page 13: ... Device Detecting Configuration SMBUS 72 3 4 10 5 Device Detecting Configuration Legacy I O 73 3 4 10 6 Device Detecting Configuration Super I O 75 3 4 10 7 Device Detecting Configuration MMIO 77 3 6 Setup Submenu System I O 78 3 6 1 PCI Express Configuration 79 3 6 2 Storage Configuration 80 3 6 3 HD Audio Subsystem Configuration Settings 81 3 6 4 HD Audio Subsystem Configuration Settings 82 3 6 ...

Page 14: ...ent 100 3 8 Setup Submenu Boot 102 3 8 1 BBS Priorities 103 3 9 Setup Submenu Save Exit 104 Chapter 4 Drivers Installation 105 4 1 Drivers Download and Installation 106 Appendix A I O Information 108 A 1 I O Address Map 109 A 2 Memory Address Map 110 A 3 IRQ Mapping Chart 111 Appendix B Mating Connectors 114 B 1 List of Mating Connectors and Cables 115 Appendix C 3 Pin ATX Behavior Description 117...

Page 15: ...EPIC Board EPIC TGH7 Chapter 1 Chapter 1 Product Specifications ...

Page 16: ...up to 4 40GHz Celeron 6600HE 2C 2T 2 60GHz Chipset Intel 500 Series Mobile Chipset RM590E HM570E Memory Type DDR4 3200 SODIMM x 2 ECC supported by Xeon W 11865MRE only Max Memory Capacity Up to 64GB BIOS AMI Wake on LAN Yes Watchdog Timer 255 Levels Power Requirement 9 24V Power Supply Type AT ATX Power Consumption Typical 12V 8 32A with Xeon W 11865MRE with 100 full loading in steady status Dimen...

Page 17: ...Channel 24 48bit LVDS Default or eDP x 1 HDMI2 0b x 1 DP 1 2a DP x 2 VGA x 1 Backlight Inverter Supply 12V 5V Default 5V I O Ethernet Intel i225 10 100 1000 2500Base RJ 45 x 1 Intel i219 10 100 1000Base RJ 45 x 1 Audio Realtek ALC269 2W Amplifier USB Port USB 3 2 Gen 2 x 4 USB 2 0 x 4 Serial Port RS 232 x 4 RS 232 422 485 x 2 Parallel Port HDD Interface SATA 3 x 2 5V SATA Power Connector x 1 SSD H...

Page 18: ...M 2 B Key 3052 x 1 Default PCIe x1 USB 3 0 USB 2 0 PCIe x2 USB 2 0 by BOM M 2 M Key 2280 x 1 PCIe 4 0 x4 PCIe 4 0 x8 slot x 1 Supply maximum 25W to the PCIe peripheral Board to board FPC connector PCIe x4 x 1 DIO 16 Bit TPM TPM 2 0 Optional Touch Optional SIM Nano SIM Optional ...

Page 19: ...EPIC Board EPIC TGH7 Chapter 2 Chapter 2 Hardware Information ...

Page 20: ...Chapter 2 Hardware Information 6 EPIC Board EPIC TGH7 2 1 Dimensions Component Side ...

Page 21: ...Chapter 2 Hardware Information 7 EPIC Board EPIC TGH7 Solder Side ...

Page 22: ...Chapter 2 Hardware Information 8 EPIC Board EPIC TGH7 2 2 Jumpers and Connectors Component Side ...

Page 23: ...Chapter 2 Hardware Information 9 EPIC Board EPIC TGH7 Solder Side ...

Page 24: ...Chapter 2 Hardware Information 10 EPIC Board EPIC TGH7 2 3 Block Diagram ...

Page 25: ...h can be configured Label Function JP1 LVDS eDP Backlight Lightness Control Mode Selection JP2 1 2 3 JP2 3 4 5 LVDS eDP Backlight Inverter VCC Selection LVDS eDP Operating VDD Selection JP3 Touch Screen 4 5 8 wire Mode Selection JP5 Auto Power Button Enable Disable Selection JP6 Clear CMOS Jumper 2 4 1 Clear CMOS Jumper JP6 Normal Default Clear CMOS 2 4 2 LVDS eDP Port Backlight Inverter VCC Selec...

Page 26: ...3 3V Default 5V 2 4 4 LVDS eDP Port Backlight Lightness Control Mode Selection JP1 VR Mode Default PWM Mode 2 4 5 Touch Screen 4 5 8 Wire Selection JP3 4 8 Wires Mode Default 5 Wires Mode 2 4 6 Auto Power Button Enable Disable Selection JP5 Disable Enable Default 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 ...

Page 27: ... table below for a list of all connectors on this board which can be configured Label Function CN1 VGA Connector CN2 FAN Connector CN3 Audio Connector CN4 SATA Connector CN5 SATA Connector CN6 LVDS eDP Connector CN7 9 24V Input VIN CN10 External 5VSB Input CN11 LVDS eDP Port Inverter Backlight Connector CN12 SATA 5V Power CN13 Speaker Right CN14 Speaker Left CN16 PCIE x8 Slot CN17 DDR4 SODIMM0 CN1...

Page 28: ... 2 Connector GEN2 CN33 Dual DP Connector CN34 FAN Connector CN38 PCIE FPC Connector CN39 Nano SIM CN40 DDR4 SODIMM1 CN41 Half Mini Card mSATA CN42 M 2 B Key 3052 CN43 M 2 M Key Slot 2280 CPU PCIE Gen 4 CN44 SPI Flash Programming Port CN45 COM Port 1 2 RS232 422 485 CN46 COM Port 3 4 RS232 Only CN47 COM Port 5 6 RS232 Only CN48 DIO 16bit CN51 9 24V Input VIN ...

Page 29: ...5 EPIC Board EPIC TGH7 2 5 1 VGA Connector CN1 Pin Pin Name Signal Type Signal Level 1 VSYNC OUT 2 HSYNC OUT 3 GND GND 4 DDC_CLK OUT 5 DDC_DATA OUT 6 GND GND 7 BLUE OUT 8 GND GND 9 GREEN OUT 10 GND GND 11 RED OUT 12 GND GND 13 5V OUT ...

Page 30: ...Pin Pin Name Signal Type Signal Level 1 HDMI_TX2 DIFF 2 GND GND GND 3 HDMI_TX2 DIFF 4 HDMI_TX1 DIFF 5 GND GND GND 6 HDMI_TX1 DIFF 7 HDMI_TX0 DIFF 8 GND GND GND 9 HDMI_TX0 DIFF 10 HDMI_CLK DIFF 11 GND GND GND 12 HDMI_CLK DIFF 13 NC 14 NC 15 DDC_CLK I O 5V 16 DDC_DATA I O 5V ...

Page 31: ... eDP CN6 LVDS eDP Pin Pin Name Signal Type Signal level 1 BKL_ENABLE BKL_ENABLE OUT 2 BKL_CONTROL BKL_CONTROL OUT 3 LCD_PWR LCD_PWR PWR 3 3V 5V 4 GND GND GND 5 LVDS_A_CLK eDP_TXN3 DIFF 6 LVDS_A_CLK eDP_TXP3 DIFF 7 LCD_PWR LCD_PWR PWR 3 3V 5V 8 GND GND GND 9 LVDS_DA0 eDP_TXN2 DIFF 10 LVDS_DA0 eDP_TXP2 DIFF ...

Page 32: ... 17 DDC_DATA eDP_AUX_N I O 3 3V 18 DDC_CLK eDP_AUX_P I O 3 3V 19 LVDS_DB0 NC DIFF 20 LVDS_DB0 NC DIFF 21 LVDS_DB1 NC DIFF 22 LVDS_DB1 NC DIFF 23 LVDS_DB2 NC DIFF 24 LVDS_DB2 NC DIFF 25 LVDS_DB3 NC DIFF 26 LVDS_DB3 NC DIFF 27 LCD_PWR LCD_PWR PWR 3 3V 5V 28 GND GND GND 29 LVDS_B_CLK NC DIFF 30 LVDS_B_CLK NC DIFF Note LVDS LCD_PWR current support 2A Note LVDS LCD_PWR can be set to 3 3V or 5V by JP2 2...

Page 33: ...Inverter Backlight Connector CN11 Pin Pin Name Signal Type Signal Level 1 BKL_PWR PWR 5V 12V 2 BKL_PWR PWR 5V 12V 3 BKL_CONTROL OUT 3 3V 4 GND GND 5 GND GND 6 BKL_ENABLE OUT 3 3V Note LVDS BKL_PWR can be set to 5V or 12V by JP2 1 3 5 Note LVDS BKL_CONTROL can be set by JP1 ...

Page 34: ...PCIE_WAKE IN 2 3 3VSB PWR 3 3V 3 NC 4 GND GND 5 NC 6 1 5V PWR 1 5V 7 PCIE_CLK_REQ IN 8 UIM_PWR PWR 9 GND GND 10 UIM_DATA I O 11 PCIE_REF_CLK DIFF 12 UIM_CLK IN 13 PCIE_REF_CLK DIFF 14 UIM_RST IN 15 GND GND 16 UIM_VPP PWR 17 NC 18 GND GND 19 NC 20 W_DISABLE OUT 3 3V 21 GND GND 22 PCIE_RST OUT 3 3V 23 PCIE_RX DIFF 24 3 3VSB PWR 3 3V ...

Page 35: ...PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX DIFF 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB PWR 3 3V 40 GND GND 41 3 3VSB PWR 3 3V 42 NC 43 GND GND 44 NC 45 NC 46 NC 47 NC 48 1 5V PWR 1 5V 49 NC 50 GND GND 51 NC 52 3 3VSB PWR 3 3V ...

Page 36: ...Chapter 2 Hardware Information 22 EPIC Board EPIC TGH7 2 5 6 SATA Port CN4 Pin Pin Name Signal Type Signal Level 1 GND GND 2 SATA_TX DIFF 3 SATA_TX DIFF 4 GND GND 5 SATA_RX DIFF 6 SATA_RX DIFF 7 GND GND ...

Page 37: ... Name Signal Type Signal Level 1 GND GND 2 SATA_TX DIFF 3 SATA_TX DIFF 4 GND GND 5 SATA_RX DIFF 6 SATA_RX DIFF 7 GND GND 2 5 8 M 2 M Key Slot 2280 CN43 Pin Pin Name Signal Type Signal Level 1 GND GND 2 3 3V PWR 3 3V 3 GND GND 4 3 3V PWR 3 3V 5 PCIE3_RX DIFF 6 NC 7 PCIE3_RX DIFF 8 NC ...

Page 38: ...ATA_LED IN 3 3V 11 PCIE3_TX GND 12 3 3V PWR 3 3V 13 PCIE3_TX GND 14 3 3V PWR 3 3V 15 GND GND 16 3 3V PWR 3 3V 17 PCIE2_RX DIFF 18 3 3V PWR 3 3V 19 PCIE2_RX DIFF 20 NC 21 GND GND 22 NC 23 PCIE2_TX DIFF 24 NC 25 PCIE2_TX DIFF 26 NC 27 GND GND 28 NC 29 PCIE1_RX DIFF 30 NC 31 PCIE1_RX DIFF 32 NC 33 GND GND 34 NC ...

Page 39: ...PCIE1_TX DIFF 36 NC 37 PCIE1_TX DIFF 38 DECSLP OUT 39 GND GND 40 NC 41 PCIE0_RX DIFF 42 NC 43 PCIE0_RX DIFF 44 NC 45 GND GND 46 NC 47 PCIE0_TX DIFF 48 NC 49 PCIE0_TX DIFF 50 PERST OUT 51 GND GND 52 PCIE_CLK_REQ IN 53 PCIE_CLK DIFF 54 PCIE_WAKE IN 55 PCIE_CLK DIFF 56 NC 57 GND GND 58 NC 67 NC 68 NC ...

Page 40: ...Chapter 2 Hardware Information 26 EPIC Board EPIC TGH7 Pin Pin Name Signal Type Signal Level 69 NC 70 3 3V PWR 3 3V 71 GND GND 72 3 3V PWR 3 3V 73 GND GND 74 3 3V PWR 3 3V 75 GND GND ...

Page 41: ..._MDI0_N 1P3 LAN2_MDI1_P 2P3 LAN1_MDI1_P 1P4 LAN2_MDI1_N 2P4 LAN1_MDI1_N 1P5 1CT5 2P5 2CT5 1P6 1CT6 2P6 2CT6 1P7 LAN2_MDI2_P 2P7 LAN1_MDI2_P 1P8 LAN2_MDI2_N 2P8 LAN1_MDI2_N 1P9 LAN2_MDI3_P 2P9 LAN1_MDI3_P 1P10 LAN2_MDI3_N 2P10 LAN1_MDI3_N 1L1 LAN2_LED_LINK 2L1 LAN1_LED_LINK 1L2 LAN2_LED_3P3A 2L2 LAN1_LED_3P3A 1L3 LAN2_LED_2500 2L3 LAN1_LED_100 1L4 LAN2_LED_1000 2L4 LAN1_LED_1000 ...

Page 42: ...ame Signal Type Signal Level 1 5VSB PWR 5V 2 USB0_D DIFF 3 USB0_D DIFF 4 GND GND 5 USB0_SSRX DIFF 6 USB0_SSRX DIFF 7 GND GND 8 USB0_SSTX DIFF 9 USB0_SSTX DIFF 10 5VSB PWR 5V 11 USB1_D DIFF 12 USB1_D DIFF 13 GND GND 14 USB1_SSRX DIFF 15 USB1_SSRX DIFF 16 GND GND 17 USB1_SSTX DIFF 18 USB1_SSTX DIFF ...

Page 43: ...2 Hardware Information 29 EPIC Board EPIC TGH7 2 5 11 SPI Flash Programming Port CN44 Pin Pin Name Signal Type Signal Level 1 SPI_MISO OUT 2 GND GND 3 SPI_CLK IN 4 3 3VSB PWR 3 3V 5 SPI_MOSI IN 6 SPI_CS IN 7 NC ...

Page 44: ...WM OUT 2 5 13 eSPI Debug Port CN24 Pin Pin Name Signal Type Signal Level 1 ESPI_IO0_EC_R I O 3 3V 2 ESPI_IO1_EC_R I O 3 3V 3 ESPI_IO2_EC_R I O 3 3V 4 ESPI_IO3_EC_R I O 3 3V 5 3 3V PWR 3 3V 6 ESPI_CS_EC_R_N IN 3 3V 7 ESPI_RST_EC_R_N OUT 3 3V 8 GND GND 9 ESPI_CLK_EC_R OUT 3 3V 10 SMB_DATA I2C_SDA 3 3V I O 3 3V 11 SMB_CLK I2C_CLK OUT 3 3V 12 SMB_ALERT SERIRQ IN 3 3V ...

Page 45: ...2 Hardware Information 31 EPIC Board EPIC TGH7 2 5 14 External Power Input CN51 Pin Pin Name Signal Type Signal Level 1 VIN PWR 12V 2 GND GND 2 5 15 ATX 12V Power Connector CN7 Standard ATX 12V Power Connector ...

Page 46: ... Pin 6 USB2_6_DP Pin 7 GND Pin 8 GND Pin 9 GND Pin 10 GND Pin 11 5V_USB Pin 12 5V_USB Pin 13 USB2_7_DN Pin 14 USB2_8_DN Pin 15 USB2_7_DP Pin 16 USB2_8_DP Pin 17 GND Pin 18 GND Pin 19 GND Pin 20 GND 2 5 17 Front Panel CN18 Pin Pin Name Pin Pin Name Pin 1 PWR_BTN Pin 2 PWR_BTN Pin 3 HDD_LED Pin 4 HDD_LED Pin 5 SPEAKER Pin 6 SPEAKER Pin 7 PWR_LED Pin 8 PWR_LED Pin 9 H W RESET Pin 10 H W RESET ...

Page 47: ...ation 33 EPIC Board EPIC TGH7 2 5 18 5V Output for SATA HDD CN12 Pin Pin Name Signal Type Signal Level 1 5V PWR 5V 2 GND GND 2 5 19 RTC Battery Connector CN26 Pin Pin Name Signal Type Signal Level 1 GND GND GND 2 3 3V PWR 3 3V ...

Page 48: ...rt CN48 Pin Pin Name Pin Pin Name Pin 1 5V Pin 2 GND Pin 3 DIO7_0 Pin 4 DIO8_0 Pin 5 DIO7_1 Pin 6 DIO8_1 Pin 7 DIO7_2 Pin 8 DIO8_2 Pin 9 DIO7_3 Pin 10 DIO8_3 Pin 11 DIO7_4 Pin 12 DIO8_4 Pin 13 DIO7_5 Pin 14 DIO8_5 Pin 15 DIO7_6 Pin 16 DIO8_6 Pin 17 DIO7_7 Pin 18 DIO8_7 ...

Page 49: ... Board EPIC TGH7 2 5 21 Speaker Left CN13 Speaker Right CN14 Pin Pin Name Signal Type Signal Level 1 AMP_OUT_L IO 2 AMP_OUT_L IO 2 5 22 External 5VSB Input CN10 Pin Pin Name Signal Type Signal Level 1 PS_ON OUT 3 3V 2 GND GND 3 5VSB PWR 5V ...

Page 50: ... Touch Screen Connector CN21 8 Wire Pin Pin Name Signal Type Signal Level 1 GND GND 2 TOP EXCITE IN 3 BOTTOM EXCITE IN 4 LEFT EXCITE IN 5 RIGHT EXCITE IN 6 TOP SENSE IN 7 BOTTOM SENSE IN 8 LEFT SENSE IN 9 RIGHT SENSE IN Note 4 8 Wire and 5 Wire can be set by JP3 ...

Page 51: ...r 2 Hardware Information 37 EPIC Board EPIC TGH7 4 Wire Pin Pin Name Signal Type Signal Level 1 GND GND 2 TOP IN 3 BOTTOM IN 4 LEFT IN 5 RIGHT IN 6 NC 7 NC 8 NC 9 NC Note 4 8 Wire and 5 Wire can be set by JP3 ...

Page 52: ...Hardware Information 38 EPIC Board EPIC TGH7 5 Wire Pin Pin Name Signal Type Signal Level 1 GND GND 2 TOP IN 3 BOTTOM IN 4 LEFT IN 5 RIGHT IN 6 Sense S IN 7 NC 8 NC 9 NC Note 4 8 Wire and 5 Wire can be set by JP3 ...

Page 53: ...EPIC TGH7 2 5 24 Audio I O Port CN3 Pin Pin Name Signal Type Signal Level 1 RIGHT_OUT OUT 2 MIC_R IN 3 LEFT_OUT OUT 4 MIC_L IN 5 JD_LOUT IN 6 JD_MIC IN 7 GND_AUDIO GND 8 GND_AUDIO GND 9 JD_LIN IN 10 LINE_R_IN IN 11 5V_AUDIO PWR 5V 12 LINE_L_IN IN ...

Page 54: ...r 2 Hardware Information 40 EPIC Board EPIC TGH7 2 5 25 Nano SIM Card Socket CN39 Pin Pin Name Signal Type Signal Level 1 UIM_PWR PWR 2 UIM_RST IN 3 UIM_CLK IN 4 NC 5 GND GND 6 UIM_VPP PWR 7 UIM_DATA I O 8 NC ...

Page 55: ... EPIC Board EPIC TGH7 2 5 26 COM Port 1 2 CN45 RS232 Pin Port 1 Pin Port 2 Pin Name Signal Type Signal Level 1 2 DCD IN 3 4 RX IN 5 6 TX OUT 5V 7 8 DTR OUT 5V 9 10 GND GND 11 12 DSR IN 13 14 RTS OUT 5V 15 16 CTS IN 17 18 RI IN 19 20 NC ...

Page 56: ...RX IN 9 10 GND GND 11 12 NC 13 14 NC 15 16 NC 17 18 5V 12V 0 5A PWR 5V 12V 19 20 NC RS485 Pin Pin Pin Name Signal Type Signal Level 1 2 RS485_ D I O 5V 3 4 RS485_D I O 5V 5 6 NC 7 8 NC 9 10 GND GND 11 12 NC 13 14 NC 15 16 NC 17 18 5V 12V 0 5A PWR 5V 12V 19 20 NC Note COM2 RS 232 422 485 can be set by BIOS setting Default is RS 232 Note Pin 8 function can be set by BOM ...

Page 57: ... EPIC Board EPIC TGH7 2 5 27 COM Port 3 4 CN46 RS232 Pin Port 4 Pin Port 3 Pin Name Signal Type Signal Level 1 2 DCD IN 3 4 RX IN 5 6 TX OUT 9V 7 8 DTR OUT 9V 9 10 GND GND 11 12 DSR IN 13 14 RTS OUT 9V 15 16 CTS IN 17 18 RI IN 19 20 NC ...

Page 58: ... EPIC Board EPIC TGH7 2 5 28 COM Port 5 6 CN47 RS232 Pin Port 6 Pin Port 5 Pin Name Signal Type Signal Level 1 2 DCD IN 3 4 RX IN 5 6 TX OUT 9V 7 8 DTR OUT 9V 9 10 GND GND 11 12 DSR IN 13 14 RTS OUT 9V 15 16 CTS IN 17 18 RI IN 19 20 NC ...

Page 59: ...DP1_TX0_DN DIFF 4 DP1_TX1_DP DIFF 5 GND GND 6 DP1_TX1_DN DIFF 7 DP1_TX2_DP DIFF 8 GND GND 9 DP1_TX2_DN DIFF 10 DP1_TX3_DP DIFF 11 GND GND 12 DP1_TX3_DN DIFF 13 DP1_OB_AUX_EN GND 14 GND GND 15 DP1_AUX_DP I O 16 GND GND 17 DP1_AUX_DN I O 18 HDMI_HPD1 I O 19 GND GND 20 V3P3S PWR 3 3V 21 DP2_TX0_DP DIFF 22 GND GND 23 DP2_TX0_DN DIFF 24 DP2_TX1_DP DIFF ...

Page 60: ...2_TX2_DP DIFF 28 GND GND 29 DP2_TX2_DN DIFF 30 DP2_TX3_DP DIFF 31 GND GND 32 DP2_TX3_DN DIFF 33 DP2_OB_AUX_EN GND 34 GND GND 35 DP2_AUX_DP I O 36 GND GND 37 DP2_AUX_DN I O 38 HDMI_HPD2 I O 39 GND GND 40 V3P3S PWR 3 3V 2 5 30 DDR4 SO DIMM Slot CN40 CN17 Standard specification 2 5 31 M 2 B Key Slot 3052 CN42 Standard specification ...

Page 61: ...V3P3S PWR 3 3V 4 SMB_DATA I O 5 SMB_CLK I O 6 BUF_PLT_RST I O 7 V3P3A PWR 3 3V 8 GND GND 9 PCIE_18_RXP DIFF 10 PCIE_18_RXN DIFF 11 GND GND 12 PCIE_20_RXP DIFF 13 PCIE_20_RXN DIFF 14 GND GND 15 PCIE_19_RXP DIFF 16 PCIE_19_RXN DIFF 17 GND GND 18 PCIE_17_RXP DIFF 19 PCIE_17_RXN DIFF 20 GND GND 21 PCIE_20_TXN DIFF 22 PCIE_20_TXP DIFF 23 GND GND 24 PCIE_19_TXN DIFF ...

Page 62: ...5 PCIE_19_TXP DIFF 26 GND GND 27 PCIE_18_TXN DIFF 28 PCIE_18_TXP DIFF 29 GND GND 30 CLK_PCIE_FPC_N DIFF 31 CLK_PCIE_FPC_P DIFF 32 GND GND 33 PCIE_17_TXN DIFF 34 PCIE_17_TXP DIFF 35 GND GND 36 V12S PWR 37 V12S PWR 38 V12S PWR 39 V12S PWR 40 V12S PWR 2 5 33 PCIE x8 Slot CN16 Standard specification ...

Page 63: ...EPIC Board EPIC TGH7 Chapter 3 Chapter 3 AMI BIOS Setup ...

Page 64: ...OS memory and BIOS NVRAM If system configuration is not found or system configuration data error is detected system will load optimized default and re boot with this default system configuration automatically There are four situations in which you will need to setup system configuration 1 You are starting your system for the first time 2 You have changed the hardware attached to your system 3 The ...

Page 65: ...it retains the Setup information when the power is turned off Entering Setup Power on the computer and press Del or ESC immediately This will allow you to enter Setup Main Set the date use tab to switch between date elements Advanced Enable disable boot option for legacy network devices System I O Host bridge parameters Boot Enables disable quiet boot option Security Set setup administrator passwo...

Page 66: ...Chapter 3 AMI BIOS Setup 52 EPIC Board EPIC TGH7 3 3 Setup Submenu Main ...

Page 67: ...Chapter 3 AMI BIOS Setup 53 EPIC Board EPIC TGH7 3 4 Setup Submenu Advanced ...

Page 68: ...ult When enabled a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology Intel R SpeedStep tm Disabled Enabled Optimal Default Failsafe Default Allows more than two frequency ranges to be supported Turbo Mode Disabled Enabled Optimal Default Failsafe Default Enable Disable processor Turbo Mode requires EMTTM enabled too AUTO means enabled ...

Page 69: ...Chapter 3 AMI BIOS Setup 55 EPIC Board EPIC TGH7 3 4 2 Memory Configuration ...

Page 70: ...Chapter 3 AMI BIOS Setup 56 EPIC Board EPIC TGH7 3 4 3 Hardware Monitor Options Summary Smart Fan Disabled Enabled Optimal Default Failsafe Default Enable or Disable Smart Fan ...

Page 71: ...pull to control 4 wire fans Linear fan application circuit to control 3 wire fan speed by fan s power terminal Output PWM mode open drain to control Intel 4 wire fans Fan 1 Smart Fan Control Manual Duty Mode Auto Duty Cycle Mode Optimal Default Failsafe Default Smart Fan Mode Select Temperature Source CPU PECI Temperature Optimal Default Failsafe Default System Temperature 2 System Temperature Sel...

Page 72: ...de Output PWM mode push pull Linear Fan Application Output PWM mode open drain Optimal Default Failsafe Default Output PWM mode push pull to control 4 wire fans Linear fan application circuit to control 3 wire fan speed by fan s power terminal Output PWM mode open drain to control Intel 4 wire fans Fan 2 Smart Fan Control Manual Duty Mode Auto Duty Cycle Mode Optimal Default Failsafe Default Smart...

Page 73: ...perature 2 System Temperature Select the monitored temperature source for this fan Duty Cycle Auto fan speed control Fan speed will follow different temperature by different duty cycle 1 100 Temperature Options Summary Manual Duty Mode 60 Optimal Default Failsafe Default Manual mode fan control user can write expected duty cycle PWM fan type 1 100 ...

Page 74: ...Chapter 3 AMI BIOS Setup 60 EPIC Board EPIC TGH7 3 4 5 PCH FW Configuration ...

Page 75: ...irmware Update Configuration Options Summary Me FW Image Re Flash Disabled Optimal Default Failsafe Default Enabled Enable Disable Me FW Image Re Flash function FW Update Disabled Enabled Optimal Default Failsafe Default Enable Disable ME FW Update function ...

Page 76: ...Chapter 3 AMI BIOS Setup 62 EPIC Board EPIC TGH7 3 4 7 NVMe Configuration ...

Page 77: ...wer Loss Last State Optimal Default Failsafe Default Always On Always Off IO Restore AC power Loss RTC wake system from S5 Disable Optimal Default Failsafe Default Fixed Time Dynamic Time Bypass Fixed Time System will wake on the hr min sec specified Dynamic Time System will wake on the current time Increase minute s Bypass BIOS will not control RTC wake function during system shutdown ...

Page 78: ...r WDT on completion of POST WDT will reset system automatically if it is not cleared before its timer counts down to zero POST Timer second 30 Optimal Default Failsafe Default Timer count set to Watch Dog Timer for POST WARNING Do not set to a value equal or shorter than normal POST time otherwise system may never complete POST unless clearing BIOS settings More than 2 x normal POST time is sugges...

Page 79: ... does this before Sends watch dog Delayed time second 10 Optimal Default Failsafe Default Period of time for Robot to hold BIOS from POST Delayed POST DXE phase Disabled Optimal Default Failsafe Default Enabled Enabled Robot holds BIOS before POST completion This allows BIOS POST to start with stable power or start after system is physically warmed Note Robot does this after Sends watch dog before...

Page 80: ...et type robot should send on each boot Retry Count 3 Optimal Default Failsafe Default Fill retry counter here Robot will reset system at most counter times and then let system continue its POST At time After show logo Optimal Default Failsafe Default Before show logo Select robot action time After show logo Robot will do action after logo is displayed System devices are almost ready Before show lo...

Page 81: ...lsafe Default Fill hold time out here Robot will hold system no longer then time out value and then let system continue its POST At time After show logo Optimal Default Failsafe Default Before show logo Select robot action time After show logo Robot will do action after logo is displayed System devices are almost ready Before show logo Robot will do action earlier before logo but some devices may ...

Page 82: ...Board EPIC TGH7 3 4 10 1 Device Detecting Configuration Interface Options Summary Interface Disabled Optimal Default Failsafe Default PCI DIO SMBUS Legacy I O Super I O MMIO Select interface robot should use to communicate with device ...

Page 83: ... Range 0 FF Function 0 Optimal Default Failsafe Default Fill FUNCTION number to a PCI device in hexadecimal Range 0 FF Device is Is not Optimal Default Failsafe Default Select that robot should or should not do action if condition met In condition Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected Acco...

Page 84: ...et 0 Optimal Default Failsafe Default Fill register offset or index for robot to read in hexadecimal Range 0 FF Bit offset 0 Optimal Default Failsafe Default Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for robot to compare register bit with specified offset Byte value 0 Optimal Default Failsafe Default Fill a b...

Page 85: ...should or should not do action if condition met DIO pin number DIO1 Optimal Default Failsafe Default DIO Fill DIO pin number DIO DIO1 and so on For COM express product 0 3 GPI0 3 n4 7 GPO0 3 Device is Is not Optimal Default Failsafe Default Select that robot should or should not do action if condition met In High Low level Low Optimal Default Failsafe Default High Select High Low level of the DIO ...

Page 86: ... in hexadecimal Range 0 FF Device is Is not Optimal Default Failsafe Default Select that robot should or should not do action if condition met In condition Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read register according to configuration Note Device will be conside...

Page 87: ...afe Default Fill register offset or index for robot to read in hexadecimal Range 0 FF Bit offset 0 Optimal Default Failsafe Default Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for robot to compare register bit with specified offset Byte value 0 Optimal Default Failsafe Default Fill a byte value for robot to com...

Page 88: ...efault Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read register according to configuration Note Device will be considered Present by Robot when data read from device is not 0xFF Register data is bitwise equal to Optimal Default Failsafe Default bytewise equal to bytewise lesser than bytewise larger than Sel...

Page 89: ...efault Select that robot should or should not do action if condition met In condition Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read register according to configuration Note Device will be considered Present by Robot when data read from device is not 0xFF Register d...

Page 90: ...dex for robot to read in hexadecimal Range 0 FF Bit offset 0 Optimal Default Failsafe Default Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for robot to compare register bit with specified offset Byte value 0 Optimal Default Failsafe Default Fill a byte value for robot to compare register data with in hexadecimal...

Page 91: ...safe Default Select that robot should or should not do action if condition met In condition Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read register according to configuration Note Device will be considered Present by Robot when data read from device is not 0xFF Regi...

Page 92: ...Failsafe Default Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for robot to compare register bit with specified offset Byte value 0 Optimal Default Failsafe Default Fill a byte value for robot to compare register data with in hexadecimal Range 0 FF 3 6 Setup Submenu System I O ...

Page 93: ...ter 3 AMI BIOS Setup 79 EPIC Board EPIC TGH7 3 6 1 PCI Express Configuration Options Summary PCI Express Root Port 16 CN41 Enabled Optimal Default Failsafe Default Disabled Control the PCI Express Root Port ...

Page 94: ... SATA Device Port 0 Disabled Enabled Optimal Default Failsafe Default Enable or Disable SATA Port Hot Plug Disabled Optimal Default Failsafe Default Enabled Designates this port as Hot Pluggable Port 1 Disabled Enabled Optimal Default Failsafe Default Enable or Disable SATA Port Hot Plug Disabled Optimal Default Failsafe Default Enabled Designates this port as Hot Pluggable ...

Page 95: ... 6 3 HD Audio Subsystem Configuration Settings Options Summary HD Audio Disabled Enabled Optimal Default Failsafe Default Control Detection of the HD Audio device Disabled HDA will be unconditionally disabled Enabled HDA will be unconditionally enabled ...

Page 96: ... EPIC Board EPIC TGH7 3 6 4 HD Audio Subsystem Configuration Settings Options Summary DIO Port Output Input Set DIO as Input or Output Output Level High Optimal Default Failsafe Default Low Set output level when DIO pin is output ...

Page 97: ...Chapter 3 AMI BIOS Setup 83 EPIC Board EPIC TGH7 3 6 5 Legacy Logical Devices Configuration ...

Page 98: ...ilsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 3F8h IRQ 4 IO 2F8h IRQ 3 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 99: ...ilsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts Mode RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 100: ...is Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 101: ...is Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 102: ...is Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 103: ...is Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows user to change Device s Resource settings New settings will be reflected on This Setup Page after System restarts ...

Page 104: ...l Port Console Redirection Options Summary Console Redirection Disabled Optimal Default Failsafe Default Enabled Console Redirection Enable or Disable Console Redirection EMS Disabled Optimal Default Failsafe Default Enabled Console Redirection Enable or Disable ...

Page 105: ...n ANSI Extended ASCII char set VT100 ASCII char set VT100 Extends VT100 to support color function keys etc VT UTF8 Uses UTF8 encoding to map Unicode chars onto 1 or more bytes Bits Per second 9600 19200 38400 57600 115200 Optimal Default Failsafe Default Selects serial port transmission speed The speed must be matched on the other side Long or noisy lines may require lower speeds ...

Page 106: ...s may require more than 1 stop bit Flow Control None Optimal Default Failsafe Default Hardware RTS CTS Flow control can prevent data loss from buffer overflow When sending data if the receiving buffers are full a stop signal can be sent to stop the data flow Once the buffers are empty a start signal can be sent to re start the flow Hardware flow control uses two wires to send start stop signals VT...

Page 107: ...Chapter 3 AMI BIOS Setup 93 EPIC Board EPIC TGH7 3 6 8 VMD Setup Menu Options Summary Enable VMD controller Disabled Optimal Default Failsafe Default Enabled Enable Disable to VMD controller ...

Page 108: ...d Enabled Optimal Default Failsafe Default Map UnMap this Root Port to VMD RAID0 Disabled Enabled Optimal Default Failsafe Default Enable Disable RAID0 support RAID1 Disabled Enabled Optimal Default Failsafe Default Enable Disable RAID1 support RAID5 Disabled Enabled Optimal Default Failsafe Default Enable Disable RAID5 support RAID10 Disabled Enabled Optimal Default Failsafe Default Enable Disabl...

Page 109: ... Disabled Enabled Optimal Default Failsafe Default Enable Disable RRT volumes can span internal and eSATA drives Intel R Optane TM Memory Disabled Enabled Optimal Default Failsafe Default Enable Disable System Acceleration with Intel R Optane TM Memory feature 3 6 9 PCH IO Configuration Options Summary MiniCard Slot Function SATA Optimal Default Failsafe Default PCIe Select function enabled for Fu...

Page 110: ...ight these items and press Enter a dialog box appears which lets you enter a password You can enter no more than six letters or numbers Press Enter after you have typed in the password A second dialog box asks you to retype the password for confirmation Press Enter after you have retyped it correctly The password is required at boot time or when the user enters the Setup utility Removing the Passw...

Page 111: ...G EFI protocol and INT1A interface will not be available SHA 1 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA 1 PCR Bank SHA256 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA256 PCR Bank Pending Operation None Optimal Default Failsafe Default TPM Clear Schedule an Operation for the Security Device NOTE Your Computer will reboot during...

Page 112: ... Disabled Enabled Optimal Default Failsafe Default Enable or Disable Endorsement Hierarchy TPM2 0 UEFI Spec Version TCG_1_2 TCG_2 Optimal Default Failsafe Default Select the TCG2 Spec Version Support TCG_1_2 The Compatible mode for Win8 Win10 TCG_2 Support new TCG2 protocol and event format for Win10 or later Physical Presence Spec Version 1 2 1 3 Optimal Default Failsafe Default Select to Tell O ...

Page 113: ... in User mode The mode change requires platform reset Secure Boot Mode Custom Optimal Default Failsafe Default Standard Secure Boot mode options Standard or Custom In Custom mode Secure Boot Policy variables can be configured by a physically present user without full authentication Restore Factory Keys Force System to User Mode Install factory default Secure Boot key databases Reset to Setup Mode ...

Page 114: ...de The mode change requires platform reset Restore Factory Keys Force System to User Mode Install factory default Secure Boot key databases Reset to Setup Mode Delete all Secure Boot key databases from NVRAM Export Secure Boot variables Copy NVRAM content of Secure Boot variables to files in a root folder on a file system device Enroll Efi Image Allow the image to run in Secure Boot mode Enroll SH...

Page 115: ...xchange Keys Details Export Update Append Delete Authorized Signatures Details Export Update Append Delete Forbidden Signatures Details Export Update Append Delete Authorized TimeStamps Update Append OsRecovery Signatures Update Append Enroll Factory Defaults or load certificates from a file 1 Public Key Certificate a EFI_SIGNATURE_LIST b EFI_CERT_X509 DER c EFI_CERT_RSA2048 bin d EFI_CERT_SHAXXX ...

Page 116: ... EPIC TGH7 3 8 Setup Submenu Boot Options Summary Quiet Boot Disabled Enabled Optimal Default Failsafe Default Enable Disable showing boot logo Lunch PXE ROM Disabled Optimal Default Failsafe Default Enabled Enable Disable UEFI Network Stack ...

Page 117: ...Chapter 3 AMI BIOS Setup 103 EPIC Board EPIC TGH7 3 8 1 BBS Priorities ...

Page 118: ...Chapter 3 AMI BIOS Setup 104 EPIC Board EPIC TGH7 3 9 Setup Submenu Save Exit ...

Page 119: ...EPIC Board EPIC TGH7 Chapter 4 Chapter 4 Drivers Installation ...

Page 120: ...nstall them Step 1 Install Chipset Drivers 1 Open the Step 1 Chipset folder 2 Open the SetupChipset exe file 3 Follow the instructions 4 Drivers will be installed automatically Step 2 Install Graphics Driver 1 Open the Step 2 Graphics folder 2 Open the Installer exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 3 Install LAN Driver 1 Open the Step 3 Ne...

Page 121: ...eral Driver folder 2 Open the SetupSerialIO exe file 3 Follow the instructions 4 Drivers will be installed automatically Step 6 Install ME TXE Drivers 1 Open the Step 6 ME TXE Driver folder 2 Open the SetupME exe file 3 Follow the instructions 4 Drivers will be installed automatically Step 7 Install Touch Controller Driver 1 Open the Step 7 Touch Controller Driver folder 2 Open the Setup exe file ...

Page 122: ...EPIC Board EPIC TGH7 Appendix A Appendix A I O Information ...

Page 123: ...Appendix A I O Information 109 EPIC Board EPIC TGH7 A 1 I O Address Map ...

Page 124: ...Appendix A I O Information 110 EPIC Board EPIC TGH7 A 2 Memory Address Map ...

Page 125: ...Appendix A I O Information 111 EPIC Board EPIC TGH7 A 3 IRQ Mapping Chart ...

Page 126: ...Appendix A I O Information 112 EPIC Board EPIC TGH7 ...

Page 127: ...Appendix A I O Information 113 EPIC Board EPIC TGH7 ...

Page 128: ...EPIC Board EPIC TGH7 Appendix B Appendix B Mating Connectors ...

Page 129: ...070150 CN6 LVDS eDP Connector HIROSE DF13 30DS 1 25 C CN10 External 5VSB Power Input and PS_ON JST PHR 3 ATX Cable 170220020B CN11 LVDS eDP port inverter Backlight Connector Aces 50233 006h CN12 SATA 5V Power JST JST PHR 2 SATA power cable 15cm 1702150155 CN13 Speaker Right JST JST PHR 2 CN14 Speaker Left JST JST PHR 2 CN18 Front Panel Connector JST SHR 10V S B Front panel cable 10cm 170X000287 CN...

Page 130: ...ble 30cm 170X000231 CN46 COM Port 3 4 RS232 Only Aces 50247 020H0 H0 001 Dual COM cable 30cm 170X000231 CN47 COM Port 5 6 RS 232 Only Aces 50247 020H0 H0 001 Dual COM cable 30cm 170X000231 CN48 DIO 16 bit Aces 50247 018H0 H0 001 CN51 9 24V input Molex 19211 0003 Double 4P power cable 10cm 170204010R CN29 L LAN Connector Molex 44915 0001 CN29 R LAN Connector Molex 44915 0001 CN34 FAN Molex 22 01 20...

Page 131: ...EPIC Board EPIC TGH7 Appendix C Appendix C 3 Pin ATX Behavior Description ...

Page 132: ...y or power adapter is powered the system will boot up Manually trigger PWRBTN to turn off the computer However this only turns off the system while the power source continues to supply power to the peripherals such as cooler SATA drive USB ports etc Case 2 When power supply or power adapter is powered the system will boot up Manually turn off the power source directly to perform computer shut down...

Page 133: ...you must manually trigger the power button signal in order to power up or turn off the system In this mode when the power supply or power source is powered manually trigger the PWRBTN signal to turn on or shut down the system However this only turns off the system while the power source continues to supply power to the peripherals such as cooler SATA drive USB ports etc ...

Page 134: ...TX mode manually triggering PWRBTN is necessary to power up or shut down the system All peripherals are powered by the S rail powers and S rail powers such as 12V and 5V so they will power on or off with the power source Pin Pin Name Signal Type Signal Level 1 PS_ON OUT 3 3V 2 GND GND 3 5VSB PWR 5V The 3 pin ATX External Connector ...

Page 135: ...it Turn Off Single Input Power Source AT Mode SBC Mainboard Powered No Power External Peripherals Powered Powered Single Input Power Source ATX Mode SBC Mainboard Powered No Power External Peripherals Powered Powered 12V Input Power with 3 pin ATX External Connector SBC Mainboard Powered No Power External Peripherals Powered No Power ...

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