Asus Aaeon BOXER-6641 User Manual Download Page 115

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Appendix A

–

Watchdog Timer Programming

101

Fan

les

s E

mb
ed

ded

BO
XE

R-

A.1 Watchdog Timer Initial Program

Table 1 : SuperIO relative register table

Default Value

Note

Index

0x2E(Note1)

SIO MB PnP Mode Index Register
0x2E or 0x4E

Data

0x2F(Note2)

SIO MB PnP Mode Data Register
0x2F or 0x4F

Table 2 : Watchdog relative register table

LDN

BitNum

Value

Note

Timer

Counter

0x07(Note3)

0xF6(Note4)

(Note24)

Time

watchdog
timer
(0~255)
This register is
byte access

Counting

Unit

0x07(Note5)

0xF5(Note6)

3(Note7)

0(Note8)

Select

time

unit.
0: second
1: minute

Watchdog

Enable

0x07(Note9) 0xF5(Note10) 5(Note11) 1(Note12)

0: Disable
1: Enable

Timeout

Status

0x07(Note13) 0xF5(Note14) 6(Note15)

1: Clear timeout
status

Output

Mode

0x07(Note16) 0xF5(Note17) 4(Note18) 1(Note19)

Select
WDTRST#
output mode
0: level
1: pulse

WDTRST

output

0x07(Note20) 0xFA(Note21) 0(Note22) 1(Note23)

Enable/Disable
time

out

output

via

WDTRST#
0: Disable
1: Enable

Summary of Contents for Aaeon BOXER-6641

Page 1: ...Last Updated March 24 2021 BOXER 6641 Fanless Embedded Box PC User s Manual 5th Ed ...

Page 2: ...ded in this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use or for any infringements upon the rights of third parties that may result from its use The material in this document is for product information only and is subject to change without notice While reasonable efforts have been made in the preparation of this document to a...

Page 3: ... is a registered trademark of Microsoft Corp Intel Pentium Celeron and Xeon are registered trademarks of Intel Corporation Intel Core is a trademark of Intel Corporation All other product names or trademarks are properties of their respective owners The publisher of this document does not assume nor imply ownership of any trademarked product not listed herein ...

Page 4: ...up your product please make sure the following items have been shipped Item Quantity BOXER 6641 1 Wallmount bracket 2 Screw Package 1 3 Pin DC In Power Connector 1 If any of these items are missing or damaged please contact your distributor or sales representative immediately ...

Page 5: ...led descriptions and explanations on the product s hardware and software features if any its specifications dimensions jumper connector settings definitions and driver installation instructions if any to facilitate users in setting up their product Users may refer to the product page at AAEON com for the latest version of this document ...

Page 6: ... transient over voltage 7 Always disconnect this device from any power supply before cleaning 8 While cleaning use a damp cloth instead of liquid or spray detergents 9 Make sure the device is installed near a power outlet and is easily accessible 10 Keep this device away from humidity 11 Place the device on a solid surface during installation to prevent falls 12 Do not cover the openings on the de...

Page 7: ...ncontrolled environment with temperatures beyond the device s permitted storage temperatures see chapter 1 to prevent damage 19 Do NOT disassemble the motherboard so as not to damage the system or void your warranty 20 If the thermal pad had been damaged please contact AAEON s salesperson to purchase a new one Do NOT use those of other brands 21 The Hex Cylinder Coppers on the front panel are not ...

Page 8: ...explosion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions and your local government s recycling or disposal directives Attention Il y a un risque d explosion si la batterie est remplacée de façon incorrecte Ne la remplacer qu avec le même modèle ou équivalent ...

Page 9: ...质或元素铅 Pb 汞 Hg 镉 Cd 六价铬 Cr VI 多溴联苯 PBB 多溴二苯醚 PBDE 印刷电路板及其电子组件外部信号连接器及线材外壳中央处理器与内存硬盘液晶模块光驱触控模块电源电池本表格依据 SJ T 11364 的规定编制表示该有毒有害物质在该部件所有均质材料中的含量均在 GB T 26572标准规定的限量要求以下表示该有害物质的某一均质材料超出了GB T 26572的限量要求然而该部件仍符合欧盟指令2011 65 EU 的规范备注一此产品所标示之环保使用期限系指在一般正常使用状况下二上述部件物质中央处理器内存硬盘光驱电源为选购品三上述部件物质液晶模块触控模块仅一体机产品适用 ...

Page 10: ...O O PSU X O O O O O Battery X O O O O O This form is prepared in compliance with the provisions of SJ T 11364 O The level of toxic or hazardous materials present in this component and its parts is below the limit specified by GB T 26572 X The level of toxic of hazardous materials present in the component exceed the limits specified by GB T 26572 but is still in compliance with EU Directive 2011 65...

Page 11: ...3 COM Port 1 Wafer Box Optional CN59 17 2 4 4 COM Port 2 Wafer Box Optional CN57 18 2 4 5 COM Port 3 Wafer Box Optional CN61 19 2 4 6 COM Port 4 Wafer Box Optional CN55 20 2 4 7 COM Port 5 Wafer Box Optional CN48 21 2 4 8 COM Port 6 Wafer Box Optional CN50 22 2 4 9 COM1 COM2 Connector RS232 RS422 RS485 CN60 23 2 4 10 COM3 COM4 Connector RS232 RS422 RS485 CN62 24 2 4 11 COM5 COM6 Connector RS232 RS...

Page 12: ...ual USB3 2 Gen 1 CN14 42 2 4 27 PCIe x4 Slot CN8 44 2 4 28 SIM Slot SIM1 47 2 5 CPU Installation 48 2 6 Memory RAM Module Installation 50 2 7 2 5 SATA Drive Installation 52 2 8 Power Connector Installation 55 Chapter 3 AMI BIOS Setup 56 3 1 System Test and Initialization 57 3 2 AMI BIOS Setup 58 3 3 Setup Submenu Main 59 3 4 Setup Submenu Advanced 60 3 4 1 Advanced Trusted Computing 61 3 4 2 Advan...

Page 13: ...nfiguration 81 3 4 10 Advanced Power Management 82 3 5 Setup submenu Chipset 84 3 5 1 Chipset System Agent SA Configuration 85 3 5 2 Chipset PCH IO Configuration 87 3 6 Setup submenu Security 89 3 6 1 Security Secure Boot 90 3 6 1 1 Key Management 91 3 7 Setup submenu Boot 95 3 8 Setup submenu Save Exit 96 Chapter 4 Drivers Installation 97 4 1 Drivers Download and Installation 98 Appendix A Watchd...

Page 14: ...Preface XIV Fanless Embedded Box PC BOXER 6641 C 2 DIO Programming 112 C 2 Digital I O Register 113 C 3 Digital I O Sample Program 115 ...

Page 15: ...Fanless Embedded Box PC BOXER 6641 Chapter 1 Chapter 1 Product Specifications ...

Page 16: ...rted Display Interface HDMI x 2 Storage Device 2 5 SATA HDD SSD Bay x 1 A1 A5 2 5 SATA HDD SSD Bay x 2 A2 A6 Ethernet Intel i211 x 3 i219 x 1 I O HDMI x 2 RJ 45 x 4 for GbE LAN i211 x 3 i219 x 1 USB3 2 Gen 1 x 4 USB2 0 x 4 A1 A5 model USB 3 2 Gen 1 x 8 A2 A6 model DB 9 x 6 for RS 232 422 485 Audio x 1 MIC in Line out 3 pin 10 35V Power Input x 1 Power Button x 1 Remote Power switch x 1 Reset Butto...

Page 17: ... x H x D 10 4 x 3 19 x 6 15 264 2mm x 80 92mm x 156 2mm Gross Weight 10 4 lbs 4 7 kg Net Weight 8 2 lbs 3 7 kg Environmental Operating Temperature 4 F 131 F 20 C 55 C with 0 5 m s airflow with TDP 35W CPU 4 F 113 F 20 C 45 C with 0 5 m s airflow with TDP 35W CPU Storage Temperature 40 F 176 F 40 C 80 C Storage Humidity 5 95 at 40 C non condensing Anti Vibration 2 Grms 5 500Hz operation SSD mSATA 1...

Page 18: ...Fanless Embedded Box PC BOXER 6641 Chapter 2 Chapter 2 Hardware Information ...

Page 19: ...Chapter 2 Hardware Information 5 Fanless Embedded Box PC BOXER 6641 2 1 BOXER 6641 Dimensions BOXER 6641 A1 A5 H310 Chipset ...

Page 20: ...Chapter 2 Hardware Information 6 Fanless Embedded Box PC BOXER 6641 ...

Page 21: ...Chapter 2 Hardware Information 7 Fanless Embedded Box PC BOXER 6641 BOXER 6641 A2 A6 C246 Chipset ...

Page 22: ...Chapter 2 Hardware Information 8 Fanless Embedded Box PC BOXER 6641 ...

Page 23: ...Chapter 2 Hardware Information 9 Fanless Embedded Box PC BOXER 6641 2 2 Jumpers and Connectors Note Board dimensions are 225mm x 151 5mm x 1 8mm ...

Page 24: ...Chapter 2 Hardware Information 10 Fanless Embedded Box PC BOXER 6641 ...

Page 25: ...o open or closed or by selecting certain pins A closed jumper has two pins connected with a jumper clip while an open jumper has no pins connected For jumpers with multiple pins this guide uses pins A B to notate which pins should be connected by a jumper clip For example pins 1 2 means you should connect pins 1 and 2 while pins 2 3 means you should connect pins 2 and 3 A pair of needle nose plier...

Page 26: ...ox PC BOXER 6641 2 3 2 ATX AT Mode Selection JP19 ATX default AT Note Disable Auto Power Button JP19 1 2 requires user to use power button JP19 1 2 to power on the system 2 3 3 CMOS Control Selection JP24 Normal Default Clear CMOS 1 2 3 1 2 3 1 2 3 1 2 3 ...

Page 27: ...afer CN18 Audio Connector CN20 Remote Button CN23 Phoenix Connector Power Input CN43 DIO Wafer Box CN45 USB2 0 HEADER CN48 COM5 HEADER RS232 RS422 RS485 CN49 COM5 COM6 Connector RS232 RS422 RS485 CN50 COM6 HEADER RS232 RS422 RS485 CN55 COM4 HEADER RS232 RS422 RS485 CN57 COM2 HEADER RS232 RS422 RS485 CN59 COM1 HEADER RS232 RS422 RS485 CN60 COM1 COM2 Connector RS232 RS422 RS485 CN61 COM3 HEADER RS23...

Page 28: ...ector USB2 0x2 for H310 Chipset CN75 HDMI Port CN76 HDMI Port LPC1 LPC Port PCIE1 Mini PCIE slot PCIE2 Mini PCIE slot PWR1 SATA PWR Connector PWR2 SATA PWR Connector PWR3 SATA PWR Connector PWR4 SATA PWR Connector SATA1 SATA1 SATA2 SATA2 SATA3 SATA3 SATA4 SATA4 SIM1 SIM Card Slot SW1 Power Button SW2 Reset Switch ...

Page 29: ...gnal Signal Type Signal Level 1 HDMI2_DATA2_P DIFF 2 GND 3 HDMI2_DATA2_N DIFF 4 HDMI2_DATA1_P DIFF 5 GND 6 HDMI2_DATA1_N DIFF 7 HDMI2_DATA0_P DIFF 8 GND 9 HDMI2_DATA0_N DIFF 10 HDMI2_CLK_P DIFF 11 GND GND 12 HDMI2_CLK_N I O 13 NC I O 14 NC 15 SCL I O 16 SDA I O 17 GND GND 18 PWR PWR 5V 19 HPD I O ...

Page 30: ...gnal Signal Type Signal Level 1 HDMI2_DATA2_P DIFF 2 GND 3 HDMI2_DATA2_N DIFF 4 HDMI2_DATA1_P DIFF 5 GND 6 HDMI2_DATA1_N DIFF 7 HDMI2_DATA0_P DIFF 8 GND 9 HDMI2_DATA0_N DIFF 10 HDMI2_CLK_P DIFF 11 GND GND 12 HDMI2_CLK_N I O 13 NC I O 14 NC 15 SCL I O 16 SDA I O 17 GND GND 18 PWR PWR 5V 19 HPD I O ...

Page 31: ...formation 17 Fanless Embedded Box PC BOXER 6641 2 4 3 COM Port 1 Wafer Box Optional CN59 Pin Signal Signal Type Signal Level 1 DCD1 IN 2 DSR1 IN 3 RX1 IN 4 RTS1 OUT 9V 5 TX1 OUT 9V 6 CTS1 IN 7 DTR1 OUT 9V 8 RI1 IN 9 GND GND ...

Page 32: ...formation 18 Fanless Embedded Box PC BOXER 6641 2 4 4 COM Port 2 Wafer Box Optional CN57 Pin Signal Signal Type Signal Level 1 DCD2 IN 2 DSR2 IN 3 RX2 IN 4 RTS2 OUT 9V 5 TX2 OUT 9V 6 CTS2 IN 7 DTR2 OUT 9V 8 RI2 IN 9 GND GND ...

Page 33: ...formation 19 Fanless Embedded Box PC BOXER 6641 2 4 5 COM Port 3 Wafer Box Optional CN61 Pin Signal Signal Type Signal Level 1 DCD3 IN 2 DSR3 IN 3 RX3 IN 4 RTS3 OUT 9V 5 TX3 OUT 9V 6 CTS3 IN 7 DTR3 OUT 9V 8 RI3 IN 9 GND GND ...

Page 34: ...formation 20 Fanless Embedded Box PC BOXER 6641 2 4 6 COM Port 4 Wafer Box Optional CN55 Pin Signal Signal Type Signal Level 1 DCD4 IN 2 DSR4 IN 3 RX4 IN 4 RTS4 OUT 9V 5 TX4 OUT 9V 6 CTS4 IN 7 DTR4 OUT 9V 8 RI4 IN 9 GND GND ...

Page 35: ...formation 21 Fanless Embedded Box PC BOXER 6641 2 4 7 COM Port 5 Wafer Box Optional CN48 Pin Signal Signal Type Signal Level 1 DCD5 IN 2 DSR5 IN 3 RX5 IN 4 RTS5 OUT 9V 5 TX5 OUT 9V 6 CTS5 IN 7 DTR5 OUT 9V 8 RI5 IN 9 GND GND ...

Page 36: ...formation 22 Fanless Embedded Box PC BOXER 6641 2 4 8 COM Port 6 Wafer Box Optional CN50 Pin Signal Signal Type Signal Level 1 DCD6 IN 2 DSR6 IN 3 RX6 IN 4 RTS6 OUT 9V 5 TX6 OUT 9V 6 CTS6 IN 7 DTR6 OUT 9V 8 RI6 IN 9 GND GND ...

Page 37: ...M2 Connector RS232 RS422 RS485 CN60 Pin RS232 RS422 RS485 Top Port 1 DCD TX D 2 RX TX D 3 TX RX NC 4 DTR RX NC 5 GND NC NC 6 DSR NC NC 7 RTS NC NC 8 CTS NC NC 9 RI NC NC Bottom Port 1 DCD TX D 2 RX TX D 3 TX RX NC 4 DTR RX NC 5 GND NC NC 6 DSR NC NC 7 RTS NC NC 8 CTS NC NC 9 RI NC NC ...

Page 38: ...M4 Connector RS232 RS422 RS485 CN62 Pin RS232 RS422 RS485 Top Port 1 DCD TX D 2 RX TX D 3 TX RX NC 4 DTR RX NC 5 GND NC NC 6 DSR NC NC 7 RTS NC NC 8 CTS NC NC 9 RI NC NC Bottom Port 1 DCD TX D 2 RX TX D 3 TX RX NC 4 DTR RX NC 5 GND NC NC 6 DSR NC NC 7 RTS NC NC 8 CTS NC NC 9 RI NC NC ...

Page 39: ...M6 Connector RS232 RS422 RS485 CN49 Pin RS232 RS422 RS485 Top Port 1 DCD TX D 2 RX TX D 3 TX RX NC 4 DTR RX NC 5 GND NC NC 6 DSR NC NC 7 RTS NC NC 8 CTS NC NC 9 RI NC NC Bottom Port 1 DCD TX D 2 RX TX D 3 TX RX NC 4 DTR RX NC 5 GND NC NC 6 DSR NC NC 7 RTS NC NC 8 CTS NC NC 9 RI NC NC ...

Page 40: ...12 Mini Card Slot Full Mini Card PCIE1 Pin Signal Signal Type Signal Level 1 PCIE_WAKE IN 2 3 3V PWR 3 3V 3 NC 4 GND GND 5 NC 6 1 5V PWR 1 5V 7 PCIE_CLK_REQ IN 8 NC PWR 9 GND GND 10 NC I O 11 PCIE_REF_CLK DIFF 12 NC IN 13 PCIE_REF_CLK DIFF 14 NC IN 15 GND GND 16 NC PWR 17 NC ...

Page 41: ...T 3 3V 21 GND GND 22 PCIE_RST OUT 3 3V 23 PCIE_RX DIFF 24 3 3VSB PWR 3 3V 25 PCIE_RX DIFF 26 GND GND 27 GND GND 28 1 5V PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX DIFF 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB PWR 3 3V 40 GND GND 41 3 3VSB PWR 3 3V 42 NC 43 GND GND ...

Page 42: ...gnal Signal Type Signal Level 44 NC 45 NC 46 NC 47 NC 48 1 5V PWR 1 5V 49 NC 50 GND GND 51 NC 52 3 3VSB PWR 3 3V 2 4 13 Mini Card Slot Full Mini Card PCIE2 Pin Signal Signal Type Signal Level 1 PCIE_WAKE IN 2 3 3V PWR 3 3V 3 NC 4 GND GND 5 NC 6 1 5V PWR 1 5V 7 PCIE_CLK_REQ IN ...

Page 43: ...O 11 PCIE_REF_CLK DIFF 12 NC IN 13 PCIE_REF_CLK DIFF 14 NC IN 15 GND GND 16 NC PWR 17 NC 18 GND GND 19 NC 20 W_DISABLE OUT 3 3V 21 GND GND 22 PCIE_RST OUT 3 3V 23 PCIE_RX DIFF 24 3 3VSB PWR 3 3V 25 PCIE_RX DIFF 26 GND GND 27 GND GND 28 1 5V PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX DIFF ...

Page 44: ...C BOXER 6641 Pin Signal Signal Type Signal Level 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB PWR 3 3V 40 GND GND 41 3 3VSB PWR 3 3V 42 NC 43 GND GND 44 NC 45 NC 46 NC 47 NC 48 1 5V PWR 1 5V 49 NC 50 GND GND 51 NC 52 3 3VSB PWR 3 3V ...

Page 45: ... Fanless Embedded Box PC BOXER 6641 2 4 14 Digital IO Port CN43 Pin Signal Signal Type Signal Level 1 DIO0 I O 5V 2 DIO1 I O 5V 3 DIO2 I O 5V 4 DIO3 I O 5V 5 DIO4 I O 5V 6 DIO5 I O 5V 7 DIO6 I O 5V 8 DIO7 I O 5V 9 5V PWR 5V 10 GND GND ...

Page 46: ...d Box PC BOXER 6641 2 4 15 LPC Port LPC1 Pin Signal Signal Type Signal Level 1 LAD0 I O 3 3V 2 LAD1 I O 3 3V 3 LAD2 I O 3 3V 4 LAD3 I O 3 3V 5 3 3V PWR 3 3V 6 LFRAME IN 7 LRESET OUT 3 3V 8 GND GND 9 LCLK OUT 10 LDRQ0 IN 11 LDRQ1 IN 12 SERIRQ I O 3 3V ...

Page 47: ...ed Box PC BOXER 6641 2 4 16 Audio I O Port 10P Pitch 1 25mm CN17 Pin Signal Signal Type Signal Level 1 MIC_L IN 2 MIC_R IN 3 GND_AUDIO GND 4 LINE_L_IN IN 5 LINE_R_IN IN 6 GND_AUDIO GND 7 LEFT_OUT OUT 8 GND_AUDIO GND 9 RIGHT_OUT OUT 10 5V_AUDIO PWR 5V ...

Page 48: ...on 34 Fanless Embedded Box PC BOXER 6641 2 4 17 Audio Connector CN18 Pin Signal Signal Type Signal Level 5 AUD_GND GND 24 LOUT_L OUT 21 LOUT_R OUT 2P HP_DET_3 IN 2Q HP_DET_4 IN 14 MIC_L IN 11 MIC_R IN 1P HP_DET_1 IN 1Q HP_DET2 IN ...

Page 49: ... Pin Signal Signal Type Signal Level 1 SPI_MISO OUT 2 GND GND 3 SPI_CLK IN 4 3 3VSB PWR 3 3V 5 SPI_MOSI IN 6 SPI_CS IN 7 NC 8 NC 2 4 19 SATA Port SATA 1 2 3 4 Pin Signal Signal Type Signal Level 1 GND GND 2 SATA_TX DIFF 3 SATA_TX DIFF 4 GND GND 5 SATA_RX DIFF 6 SATA_RX DIFF 7 GND GND Pin 1 Pin 7 ...

Page 50: ... 20 USB2 0 Wafer BOX 5P Pitch 1 25mm CN 45 71 72 Pin Signal Signal Type Signal Level 1 5V GND 5V 2 USBD DIFF 3 USBD DIFF 4 GND GND 5 GND GND 2 4 21 SATA PWR PWR 1 2 3 4 Pin Signal Signal Type Signal Level 1 12V PWR 12V 2 GND GND 3 GND GND 4 5V PWR 5V 12V 1 2 3 4 GND GND 5V ...

Page 51: ...OXER 6641 2 4 22 DC IN Connector CN23 Pin Signal Signal Type Signal Level 1 VIN PWR 10V 35V 2 GND GND 3 GND_EARTH 2 4 23 LAN RJ 45 Dual USB3 2 Gen 1 CN74 Pin Signal Signal Type Signal Level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF ...

Page 52: ... Note USB2 0x2 for H310 Chipset Pin Signal Signal Type Signal Level 1 5VSB PWR 5V 2 USB1_D DIFF 3 USB1_D DIFF 4 GND GND 5 USB1_SSRX DIFF 6 USB1_SSRX DIFF 7 GND GND 8 USB1_SSTX DIFF 9 USB1_SSTX DIFF 10 5VSB PWR 5V 11 USB2_D DIFF 12 USB2_D DIFF 13 GND GND 14 USB2_SSRX DIFF 10 Port 1 Port 0 11 12 13 1 2 3 4 14 15 16 17 18 5 6 7 8 9 ...

Page 53: ...in Signal Signal Type Signal Level 15 USB2_SSRX DIFF 16 GND GND 17 USB2_SSTX DIFF 18 USB2_SSTX DIFF 2 4 24 LAN RJ 45 Dual USB3 2 Gen 1 CN73 Pin Signal Signal Type Signal Level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF ...

Page 54: ...evel 1 5VSB PWR 5V 2 USB3_D DIFF 3 USB3_D DIFF 4 GND GND 5 USB3_SSRX DIFF 6 USB3_SSRX DIFF 7 GND GND 8 USB3_SSTX DIFF 9 USB3_SSTX DIFF 10 5VSB PWR 5V 11 USB4_D DIFF 12 USB4_D DIFF 13 GND GND 14 USB4_SSRX DIFF 15 USB4_SSRX DIFF 16 GND GND 17 USB4_SSTX DIFF 18 USB4_SSTX DIFF 10 Port 1 Port 0 11 12 13 1 2 3 4 14 15 16 17 18 5 6 7 8 9 ...

Page 55: ...J 45 Dual USB3 2 Gen 1 CN15 Pin Signal Signal Type Signal Level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF Pin Signal Signal Type Signal Level 1 5VSB PWR 5V 2 USB5_D DIFF 10 Port 1 Port 0 11 12 13 1 2 3 4 14 15 16 17 18 5 6 7 8 9 ...

Page 56: ...FF 4 GND GND 5 USB5_SSRX DIFF 6 USB5_SSRX DIFF 7 GND GND 8 USB5_SSTX DIFF 9 USB5_SSTX DIFF 10 5VSB PWR 5V 11 USB6_D DIFF 12 USB6_D DIFF 13 GND GND 14 USB6_SSRX DIFF 15 USB6_SSRX DIFF 16 GND GND 17 USB6_SSTX DIFF 18 USB6_SSTX DIFF 2 4 26 LAN RJ 45 Dual USB3 2 Gen 1 CN14 Pin Signal Signal Type Signal Level 1 MDI0 DIFF ...

Page 57: ...IFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF Pin Signal Signal Type Signal Level 1 5VSB PWR 5V 2 USB7_D DIFF 3 USB7_D DIFF 4 GND GND 5 USB7_SSRX DIFF 6 USB7_SSRX DIFF 7 GND GND 8 USB7_SSTX DIFF 9 USB7_SSTX DIFF 10 5VSB PWR 5V 10 Port 1 Port 0 11 12 13 1 2 3 4 14 15 16 17 18 5 6 7 8 9 ...

Page 58: ...USB8_D DIFF 12 USB8_D DIFF 13 GND GND 14 USB8_SSRX DIFF 15 USB8_SSRX DIFF 16 GND GND 17 USB8_SSTX DIFF 18 USB8_SSTX DIFF 2 4 27 PCIe x4 Slot CN8 Pin Signal Signal Type Signal Level A1 PRSNT1 I O A2 12V PWR V12S A3 12V PWR V12S A4 GND GND A5 PCIE_TXN5 DIFF A6 PCIE_TXP5 DIFF A7 PCIE_RXN5 DIFF A8 PCIE_RXP5 DIFF ...

Page 59: ... GND GND A13 PCIE_x4SLOT_CLK DIFF A14 PCIE_x4SLOT_CLK DIFF A15 GND GND A16 PCIE_RXP24 DIFF A17 PCIE_RXN24 DIFF A18 GND GND A19 NC A20 GND GND A21 PCIE_RXP23 DIFF A22 PCIE_RXN23 DIFF A23 GND GND A24 GND GND A25 PCIE_RXP22 DIFF A26 PCIE_RXP22 DIFF A27 GND GND A28 GND GND A29 PCIE_RXP21 DIFF A30 PCIE_RXN21 DIFF A31 GND GND A32 NC B1 12V PWR V12S B2 12V PWR V12S ...

Page 60: ...6 SMB_DATA I O B7 GND GND B8 V3 3S PWR V3 3S B9 NC B10 3 3Vaux PWR V3 3A B11 WAKE I O B12 NC B13 GND GND B14 PCIE_TXP24 DIFF B15 PCIE_TXN24 DIFF B16 GND GND B17 PRSNT I O B18 GND GND B19 PCIE_TXP23 DIFF B20 PCIE_TXN23 DIFF B21 GND GND B22 GND GND B23 PCIE_TXP22 DIFF B24 PCIE_TXN22 DIFF B25 GND GND B26 GND GND B27 PCIE_TXP21 DIFF B28 PCIE_TXN21 DIFF ...

Page 61: ...Embedded Box PC BOXER 6641 Pin Signal Signal Type Signal Level B29 GND GND B30 NC B31 PRSNT I O B32 GND GND 2 4 28 SIM Slot SIM1 Pin Signal Signal Type Signal Level 1 UIM_PWR PWR 2 UIM_RST IN 3 UIM_CLK IN 4 GND GND 5 UIM_VPP PWR 6 UIM_DATA I O ...

Page 62: ...the system is powered down and disconnect the power cord from the system Make sure you have the processor ready to install See Chapter 1 Specifications for list of compatible CPU processors Step 1 Remove the screws on the front and back of the BOXER 6641 as shown in the figure below six in total and remove the top heatsink ...

Page 63: ...Information 49 Fanless Embedded Box PC BOXER 6641 Step 2 Install the CPU into the socket and place the thermal pad on top of the processor Step 3 Place the heatsink back on and secure with the screws you removed in Step 1 ...

Page 64: ...e RAM ensure the system is powered down and disconnect the power cord from the system Make sure you have the RAM module ready to install See Chapter 1 for RAM requirements and specifications Step 1 Remove the eight 8 screws from the bottom of the BOXER 6641 as shown in the figure below Remove the bottom panel from the system ...

Page 65: ...sert them into the RAM slots Note the figure below for placement of thermal pads When inserting the modules into the RAM slots first insert at an angle 30 then gently push down until secure Step 3 Install the RAM bracket Ensure it is oriented as shown in the figure below Attach the bracket to the chassis using two screws ...

Page 66: ...moved in Step 1 of this section 2 7 2 5 SATA Drive Installation Before installing the SATA Drive ensure the system is powered down and disconnect the power cord from the system Make sure you have the SATA Drive ready to install See Chapter 1 for SATA drive specifications for compatibility Step 1 If you have not already done so remove the eight 8 screws from the bottom of the BOXER 6641 as shown in...

Page 67: ...ve to the HDD Bracket using the screws provided Step 3 Attach the HDD Bracket to the bottom panel using four screws as shown in the figure below Attach the SATA and SATA Power cables to the board and the SATA drive Step 1 Use the HDD screws provided to assemble 2 5 SATA drive with the HDD Bracket ...

Page 68: ...Chapter 2 Hardware Information 54 Fanless Embedded Box PC BOXER 6641 Step 4 Replace the bottom panel and secure with the eight 8 screws you removed in Step 1 ...

Page 69: ...Information 55 Fanless Embedded Box PC BOXER 6641 2 8 Power Connector Installation Step 1 Take out the 3 pin green phoenix power connector from the accessory kit Step 2 Connect to the power input port shown in the diagram ...

Page 70: ...Embedded Box PC BOXER 6641 Chapter 3 Chapter 3 AMI BIOS Setup ...

Page 71: ...n verification routines check the current system configuration against the values stored in the CMOS memory If they do not match an error message will be output and the BIOS setup program will need to be run to set the configuration information in memory There are three situations in which the CMOS settings will need to be set or changed Starting the system for the first time The system hardware h...

Page 72: ...d when the power is turned off To enter BIOS Setup press Del or F2 immediately while your computer is powering up The function for each interface can be found below Main Date and time can be set here Press Tab to switch between date elements Advanced Enable Disable boot option for legacy network devices Chipset For hosting bridge parameters Security The setup administrator password can be set here...

Page 73: ...Chapter 3 AMI BIOS Setup 59 Fanless Embedded Box PC BOXER 6641 3 3 Setup Submenu Main ...

Page 74: ...Chapter 3 AMI BIOS Setup 60 Fanless Embedded Box PC BOXER 6641 3 4 Setup Submenu Advanced ...

Page 75: ...tocol and INT1A interface will not be available SHA 1 PCR Bank Enabled Optimal Default Failsafe Default Disabled Enable or Disable SHA 1 PCR Bank SHA256 PCR Bank Enabled Optimal Default Failsafe Default Disabled Enable or Disable SHA256 PCR Bank Pending operation None Optimal Default Failsafe Default TPM Clear Schedule an Operation for the Security Device NOTE Your Computer will reboot during rest...

Page 76: ...Optimal Default Failsafe Default TCG_1_2 Select the TCG2 Spec Version Support TCG_1_2 Compatible mode for Win8 Win10 TCG_2 Support new TCG2 protocol and event format for Win10 or later Physical Presence Spec Version 1 3 Optimal Default Failsafe Default 1 2 Select to Tell O S to support PPI Spec Version 1 2 or 1 3 Note some HCK tests might not support 1 3 Device Select Auto Optimal Default Failsafe...

Page 77: ...safe Default When enabled a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology Active Processor Cores 1 2 3 All Optimal Default Failsafe Default Number of cores to enable in each processor package Intel R SpeedStep tm Disabled Enabled Optimal Default Failsafe Default Allows more than two frequency ranges to be supported Table Continues on Next Page ...

Page 78: ...w for hardware controlled P states Turbo Mode Disabled Enabled Optimal Default Failsafe Default Enable Disable Processor Turbo Mode requires Intel Speed Step or Intel Speed Shift to be available or enabled C states Disabled Optimal Default Failsafe Default Enabled Enable Disable CPU Power Management Allows CPU to go C states when it s not 100 utilized Hyper Threading Disabled Enabled Optimal Defau...

Page 79: ...timal Default Failsafe Default Disabled When Disabled ME will be put into ME Temporarily Disabled Mode AMT BIOS Feature Enabled Optimal Default Failsafe Default Disabled When disabled AMT BIOS Features are no longer supported and user is no longer able to access MEBx Setup Note This option does not disable Manageability Features in FW ...

Page 80: ...3 1 Firmware Update Configuration Options Summary ME FW Image Re Flash Enabled Disabled Optimal Default Failsafe Default Enable Disable ME FW Image Re Flash function Local FW Update Enabled Optimal Default Failsafe Default Disabled Options for Local FW Update function ...

Page 81: ...41 3 4 3 2 PTT Configuration Options Summary ME FW Image Re Flash dTPM PTT Optimal Default Failsafe Default Selects TPM device PTT or dTPM PTT Enables PTT in SkuMgr dTPM 1 2 Disables PTT in SkuMgr Warning PTT dTPM will be disabled and all saved data will be lost ...

Page 82: ...T Premium With Intel Optane System Acceleration Determines how SATA controller s operate Aggressive LPM Support Enabled Disabled Optimal Default Failsafe Default Enable PCH to aggressively enter link power state mSATA Enabled Optimal Default Failsafe Default Disabled Enable or Disable SATA Port Port 1 2 3 4 Enabled Optimal Default Failsafe Default Disabled Enable or Disable SATA Port ...

Page 83: ... XHCI Hand off Enabled Optimal Default Failsafe Default Disabled This is a workaround for OSes without XHCI Hand off support The XHCI ownership change should be claimed by XHCI driver USB Mass Storage Driver Support Enabled Optimal Default Failsafe Default Disabled Enable Disable USB Mass Storage Driver Support ...

Page 84: ...Chapter 3 AMI BIOS Setup 70 Fanless Embedded Box PC BOXER 6641 3 4 6 Advanced Hardware Monitor ...

Page 85: ...Chapter 3 AMI BIOS Setup 71 Fanless Embedded Box PC BOXER 6641 3 4 7 Advanced SIO Configuration ...

Page 86: ...sabled Enabled or Disabled this Logical Device Device resource settings USB Automatic Setting Optimal Default Failsafe Default IO 3F8h IRQ 4 IO 2F8h IRQ 3 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts UART selection RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 87: ...sabled Enabled or Disabled this Logical Device Device resource settings USB Automatic Setting Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts UART selection RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 88: ...abled Enabled or Disabled this Logical Device Device resource settings USB Automatic Setting Optimal Default Failsafe Default IO 3E8h IRQ 11 IO 2E8h IRQ 11 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts UART selection RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 89: ...abled Enabled or Disabled this Logical Device Device resource settings USB Automatic Setting Optimal Default Failsafe Default IO 2E8h IRQ 11 IO 3E8h IRQ 11 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts UART selection RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 90: ...abled Enabled or Disabled this Logical Device Device resource settings USB Automatic Setting Optimal Default Failsafe Default IO 2D0h IRQ 11 IO 2C0h IRQ 11 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts UART selection RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 91: ...abled Enabled or Disabled this Logical Device Device resource settings USB Automatic Setting Optimal Default Failsafe Default IO 2C0h IRQ 11 IO 2D0h IRQ 11 Allows the user to change the device resource settings New settings will be reflected on this setup page after system restarts UART selection RS232 Optimal Default Failsafe Default RS422 RS485 UART RS232 422 485 selection ...

Page 92: ...etup 78 Fanless Embedded Box PC BOXER 6641 3 4 8 Advanced Network Stack Configuration Network Stack Disabled Options Summary Network Stack Disabled Enabled Optimal Default Failsafe Default Enable Disable UEFI Network Stack ...

Page 93: ...safe Default Enable Disable IPv4 PXE boot support If disabled IPv4 PXE boot support will not be available Ipv4 HTTP Support Disabled Optimal Default Failsafe Default Enabled Enable Disable IPv4 HTTP boot support If disabled IPv4 HTTP boot support will not be available PXE boot wait time 0 Optimal Default Failsafe Default Wait time in seconds to press ESC key to abort the PXE boot Use either or num...

Page 94: ...BIOS Setup 80 Fanless Embedded Box PC BOXER 6641 Options Summary Media detect count 1 Optimal Default Failsafe Default Number of times the presence of media will be checked Use either or numeric keys to set the value ...

Page 95: ...PC BOXER 6641 3 4 9 Advanced Digital IO Port Configuration Options Summary DIO Type Output Optimal Default Failsafe Default Input Set DIO as Input or Output DIO Data Low High Optimal Default Failsafe Default Set is output level when DIO pin is output ...

Page 96: ...er supply mode AC Power Loss Last State Optimal Default Failsafe Default Power On Power Off Select power state when power is re applied after a power failure RTC wake system from S5 Disabled Optimal Default Failsafe Default Enabled Fixed Time System will make on the hr min sec specified Dynamic Time System will wake on the current time Increase minute S Table Continues on Next Page ...

Page 97: ... Summary RTC wake system from S5 Enabled Wake up day 0 Select 0 for daily system wake up 1 31 for which day of the month that you would like system to wake up Wake up hour 0 Select 0 23 For example enter 3 for 3am and 15 for 3pm Wake up minute 0 0 59 Wake up second 0 0 59 ...

Page 98: ...Chapter 3 AMI BIOS Setup 84 Fanless Embedded Box PC BOXER 6641 3 5 Setup submenu Chipset ...

Page 99: ...gh System Agent Geyserville Fixed Low Mid High SA GV disabled MRC only runs tasks from Low Mid or High point SA GV will be disabled on DT Halo CPUs regardless of this setting PM Support Enabled Optimal Default Failsafe Default Disabled Enable Disable PM Support RC6 Render Standby Enabled Optimal Default Failsafe Default Disabled Check to enable render standby support Table Continues on Next Page ...

Page 100: ...t Failsafe Default Select DVMT5 0 Total Graphic Memory sized used by the Internal Graphics Device VT d Enabled Disabled Optimal Default Failsafe Default VT d capability Skip Scaning of External Gfx Card Enabled Disabled Optimal Default Failsafe Default If Enabled it will not scan for External Gfx Card on PEG and PCH PCIE Ports ...

Page 101: ...abled Control the Detection of the Audio device Disabled HDA will be unconditionally disabled Enabled HDA will be unconditionally enabled PCI Express x4 Slot x1 Speed C246 Only Auto Optimal Default Failsafe Default Gen 1 Gen 2 Gen 3 Configure PCIe Speed PCI Express x4 Slot x4 Speed C246 Only Auto Optimal Default Failsafe Default Gen 1 Gen 2 Gen 3 Configure PCIe Speed ...

Page 102: ...ER 6641 Options Summary Mini Card 1 Slot PCIe Speed Auto Optimal Default Failsafe Default Gen 1 Gen 2 Configure PCIe Speed Mini Card 2 PCIE2 mSATA PCIe Selection mSATA Optimal Default Failsafe Default PCIe Select mSATA or PCIe function for Mini Card 2 PCIE2 ...

Page 103: ... when the user enters the Setup utility A User Password does not provide access to many of the features in the Setup utility Select the password you wish to set and press Enter In the dialog box enter your password must be between 3 and 20 letters or numbers Press Enter and retype your password to confirm Press Enter again to set the password Removing the Password Select the password you want to r...

Page 104: ... mode The mode change requires platform reset Secure Boot Mode Standard Custom Optimal Default Failsafe Default Secure Boot Mode options Standard or Custom In Custom mode Secure Boot Policy variables can be configured by a physically present user without full authentication Restore Factory Keys Yes No Force System to User Mode Install factory default Secure Boot key databases Key Management Enable...

Page 105: ... and while the System is in Setup mode Restore Factory Keys No Press Yes to install factory default keys Yes Force System to User Mode Install Factory default Secure Boot key databases Reset To Setup Mode No Yes Deleting all variables will reset the System to Setup Mode Delete all Secure Boot key databases from NVRAM Export Secure Boot variables Copy NVRAM content of Secure Boot variables to files...

Page 106: ...lts Secure Boot variable Size Keys key Source Platform key PK 1153 1 No Key Details Enroll Factory Defaults or load certificates from a file 1 Public key Certificate a EFI_SIGNATURE_LIST b EFI_CERT_X509 DER c EFI_CERT_RSA2048 bin d EFI_CERT_SHAXXX 2 Authenticated UEFI Variable 3 EFI PE COFF Image SHA256 Key Source Factory External Mixed Export Update Delete Key Exchange keys 1153 1 No Key Details ...

Page 107: ...gnatures 3274 77 No Key Details Enroll Factory Defaults or load certificates from a file 1 Public key Certificate a EFI_SIGNATURE_LIST b EFI_CERT_X509 DER c EFI_CERT_RSA2048 bin d EFI_CERT_SHAXXX 2 Authenticated UEFI Variable 3 EFI PE COFF Image SHA256 Key Source Factory External Mixed Export Update Append Delete Authorized TimeStamps 0 0 No Key Update Enroll Factory Defaults or load certificates ...

Page 108: ...ce OsRecovery Signatures 0 0 No Key Update Enroll Factory Defaults or load certificates from a file 1 Public key Certificate a EFI_SIGNATURE_LIST b EFI_CERT_X509 DER c EFI_CERT_RSA2048 bin d EFI_CERT_SHAXXX 2 Authenticated UEFI Variable 3 EFI PE COFF Image SHA256 Key Source Factory External Mixed Append ...

Page 109: ...Chapter 3 AMI BIOS Setup 95 Fanless Embedded Box PC BOXER 6641 3 7 Setup submenu Boot Options Summary Quiet Boot Disabled Enabled Optimal Default Failsafe Default Enables or disables Quiet Boot option ...

Page 110: ...Chapter 3 AMI BIOS Setup 96 Fanless Embedded Box PC BOXER 6641 3 8 Setup submenu Save Exit ...

Page 111: ...Fanless Embedded Box PC BOXER 6641 Chapter 4 Chapter 4 Drivers Installation ...

Page 112: ...p 1 Install Chipset Driver 1 Open the Step1 Chipset folder and select your OS 2 Run the SetupChipset exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 2 Install Graphics Driver 1 Open the Step2 Graphic folder and select your OS 2 Run the igxpin exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 3 Install ME ...

Page 113: ...8 64bit_Win7_Win8_Win81_Win10_R281 exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 6 Install Intel RST Driver 1 Open the Step6 Intel RST folder and select your OS 2 Run the SetupRST exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Step 7 Install Serial Port Driver Optional 1 Open the Step7 Serial Port Driver ...

Page 114: ...Fanless Embedded Box PC BOXER 6641 Appendix A Appendix A Watchdog Timer Programming ...

Page 115: ...ue Note Timer Counter 0x07 Note3 0xF6 Note4 Note24 Time of watchdog timer 0 255 This register is byte access Counting Unit 0x07 Note5 0xF5 Note6 3 Note7 0 Note8 Select time unit 0 second 1 minute Watchdog Enable 0x07 Note9 0xF5 Note10 5 Note11 1 Note12 0 Disable 1 Enable Timeout Status 0x07 Note13 0xF5 Note14 6 Note15 1 1 Clear timeout status Output Mode 0x07 Note16 0xF5 Note17 4 Note18 1 Note19 S...

Page 116: ...is parameter is represented from Note8 define byte EnableLDN This parameter is represented from Note9 define byte EnableReg This parameter is represented from Note10 define byte EnableBit This parameter is represented from Note11 define byte EnableVal This parameter is represented from Note12 define byte StatusLDN This parameter is represented from Note13 define byte StatusReg This parameter is re...

Page 117: ...s Embedded Box PC BOXER 6641 VOID Main Procedure AaeonWDTConfig byte Timer Time of WDT timer 0x00 0xFF boolean Unit Select time unit 0 second 1 minute AaeonWDTConfig Procedure AaeonWDTEnable This procudure will enable the WDT counting AaeonWDTEnable ...

Page 118: ...relative parameter setting WDTParameterSetting VOID WDTEnableDisable byte LDN byte Register byte BitNum byte Value SIOBitSet LDN Register BitNum Value VOID WDTParameterSetting Watchdog Timer counter setting SIOByteSet TimerLDN TimerReg TimerVal WDT counting unit setting SIOBitSet UnitLDN UnitReg UnitBit UnitVal WDT output mode setting level pulse SIOBitSet ModeLDN ModeReg ModeBit ModeVal Watchdog ...

Page 119: ... Register Offset 0x07 IOWriteByte SIOData LDN VOID SIOBitSet byte LDN byte Register byte BitNum byte Value Byte TmpValue SIOEnterMBPnPMode SIOSelectLDN byte LDN IOWriteByte SIOIndex Register TmpValue IOReadByte SIOData TmpValue 1 BitNum TmpValue Value BitNum IOWriteByte SIOData TmpValue SIOExitMBPnPMode VOID SIOByteSet byte LDN byte Register byte Value SIOEnterMBPnPMode SIOSelectLDN LDN IOWriteByt...

Page 120: ...Fanless Embedded Box PC BOXER 6641 Appendix B Appendix B I O Information ...

Page 121: ...Appendix B I O Information 107 Fanless Embedded Box PC BOXER 6641 B 1 I O Address Map ...

Page 122: ...Appendix B I O Information 108 Fanless Embedded Box PC BOXER 6641 ...

Page 123: ...Appendix B I O Information 109 Fanless Embedded Box PC BOXER 6641 B 2 IRQ Mapping Chart ...

Page 124: ...Fanless Embedded Box PC BOXER 6641 Appendix C Appendix C Digital I O Ports ...

Page 125: ...ital I O Information 111 Fanless Embedded Box PC BOXER 6641 C 1 Electrical Specifications for Digital I O Ports GPIO70 DIO_0 GPIO71 DIO_1 GPIO72 DIO_2 GPIO73 DIO_3 GPIO74 DIO_4 GPIO75 DIO_5 GPIO76 DIO_6 GPIO77 DIO_7 ...

Page 126: ...detail the procedures to complete its configuration The AAEON initial DIO program is also attached to help with developing a customized program for your application There are three steps to complete the configuration setup Step 1 Enter MB PnP Mode Step 2 Modify the data in the configuration registers Step 3 Exit MB PnP Mode Undesired results may occur if MB PnP Mode is not exited properly ...

Page 127: ...ote15 0x82 Note16 4 Note17 GPIO74 DIO 6 Pin Status 0x06 Note18 0x82 Note19 5 Note20 GPIO75 DIO 7 Pin Status 0x06 Note21 0x82 Note22 6 Note23 GPIO76 DIO 8 Pin Status 0x06 Note24 0x82 Note25 7 Note26 GPIO77 Table 3 Digital Output relative register table LDN Register BitNum Value Note DIO 1 Output Data 0x06 Note27 0x81 Note28 0 Note29 Note30 GPIO70 DIO 2 Output Data 0x06 Note31 081 Note32 1 Note33 No...

Page 128: ...Appendix C Digital I O Information 114 Fanless Embedded Box PC BOXER 6641 ...

Page 129: ...e DInput3Reg This parameter is represented from Note10 define byte DInput3Bit This parameter is represented from Note11 define byte DInput4LDN This parameter is represented from Note12 define byte DInput4Reg This parameter is represented from Note13 define byte DInput4Bit This parameter is represented from Note14 define byte DInput5LDN This parameter is represented from Note15 define byte DInput5R...

Page 130: ...This parameter is represented from Note40 define byte DOutput4Bit This parameter is represented from Note41 define byte DOutput4Val This parameter is represented from Note42 define byte DOutput5LDN This parameter is represented from Note43 define byte DOutput5Reg This parameter is represented from Note44 define byte DOutput5Bit This parameter is represented from Note45 define byte DOutput5Val This...

Page 131: ...us Input Example Read Digital I O Pin 3 status Output InputStatus 0 Digital I O Pin level is low 1 Digital I O Pin level is High PinStatus AaeonReadPinStatus DInput3LDN DInput3Reg DInput3Bit Procedure AaeonSetOutputLevel Input Example Set Digital I O Pin 6 level AaeonSetOutputLevel DOutput6LDN DOutput6Reg DOutput6Bit DOutput6Val ...

Page 132: ...ean AaeonReadPinStatus byte LDN byte Register byte BitNum Boolean PinStatus PinStatus SIOBitRead LDN Register BitNum Return PinStatus VOID AaeonSetOutputLevel byte LDN byte Register byte BitNum byte Value ConfigToOutputMode LDN Register BitNum SIOBitSet LDN Register BitNum Value ...

Page 133: ...egister Offset 0x07 IOWriteByte SIOData LDN VOID SIOBitSet byte LDN byte Register byte BitNum byte Value Byte TmpValue SIOEnterMBPnPMode SIOSelectLDN byte LDN IOWriteByte SIOIndex Register TmpValue IOReadByte SIOData TmpValue 1 BitNum TmpValue Value BitNum IOWriteByte SIOData TmpValue SIOExitMBPnPMode VOID SIOByteSet byte LDN byte Register byte Value SIOEnterMBPnPMode SIOSelectLDN LDN IOWriteByte ...

Page 134: ...ndex Register TmpValue IOReadByte SIOData TmpValue 1 BitNum SIOExitMBPnPMode If TmpValue 0 Return 0 Return 1 VOID ConfigToOutputMode byte LDN byte Register byte BitNum Byte TmpValue OutputEnableReg OutputEnableReg Register 1 SIOEnterMBPnPMode SIOSelectLDN LDN IOWriteByte SIOIndex OutputEnableReg TmpValue IOReadByte SIOData TmpValue 1 BitNum IOWriteByte SIOData OutputEnableReg SIOExitMBPnPMode ...

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