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Z690 PG Riptide
ODT PARK (A1)
Configure the memory on die termination resistors' PARK for channel A1.
ODT PARK (A2)
Configure the memory on die termination resistors' PARK for channel A2.
ODT PARK (B1)
Configure the memory on die termination resistors' PARK for channel B1.
ODT PARK (B2)
Configure the memory on die termination resistors' PARK for channel B2.
Advanced Setting
ASRock Timing Optimization
Configure the fast path through the MRC.
ASRock Second Timing Optimization
Configure the second fast path through the MRC.
Realtime Memory Timing
Configure the realtime memory timings.
[Enabled] The system will allow performing realtime memory timing changes after
MRC_DONE.
Early Command Training
Configure the Early Command Training.
Early Command Training is the initial step after reading SPD and configuring DDR
interface to desired speed/timings.
Read Equalization Training
Configure the Read Equalization Training.
Reset for MRC Failed
Reset system after MRC training is failed.
MRC Training on Warm Boot
When enabled, memory training will be executed when warm boot.
Summary of Contents for Z690 PG Riptide
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