Asahi KASEI AK4588, Manual, Page: 38 / 76

ASAHI KASEI [AK4589]
MS0339-E-00 2004/09
- 38 -
DAC partial Power-Down Function
All DACs of The AK4589 can be powered-down individually by PD1-4 bits. The analog part of DAC is in power-down
by PD1-4 bits =”1”, however, the digital part is not in power-down by it. Even if all DACs were set in power-down by
the partial power-down bits, the digital part continue to function. The analog output of the channel which is set in
power-down by PD1-4 bits is fixed to the voltage of VCOM. And though DZF detection is being done, the result of
DZF detection stops reflecting to DZF1-2 pins. Because some click noise occurs in both set-up and release of
power-down, either the analog output should be muted externally or PD1-4 bits should be set up when it is in PWDAN
bit =”0” or RSTN bit =”0”, if the click noise influences system application. Figure 16 shows the sequence of the
power-down and the power-up by PD1-4 bits.
PD1-4 bit
DZF1/DZF2
8192/fs
“0”data
DAC In
(Digital)
DAC Out
(Analog)
GD GD
(1)
(3) (3)
(2)
DAC Digital
Internal State
Normal Operation Normal Operation
DAC Analog
Internal State
Power-down
Normal Operation
Clock In
MCLK,LRCK1,
BICK1
DAC In
(Digital)
DAC Out
(Analog)
Normal Operation Channel
(4)
(5)
GD
8192/fs
GD
Power-down Normal Operation Normal Operation
(2)
(3)
(3)
(4)
Power Down Channel
DZF Detect
Internal State
DZF Detect
Internal State
“0”data
(6)
Notes:
(1) Digital output corresponding to analog input and analog output corresponding to digital input have the group
delay (GD).
(2) Analog output of the DAC powered down by PD1-4 bits =”1” is fixed to the voltage of VCOM.
(3) Immediately after PD1-4 bits are changed, some click noise occurs at the output of the channel changed by the
own PD bits.
(4) Though DZF detection is being done at a certain channel which set up PD1-4 bits =”1”, the result of DZF
detection stops reflecting to DZF1-2 pins.
(5) DZF detection of the DAC which is set up by the power-down setting is ignored, and DZF1-2 pins become ”H”.
(6) When the power-down function is set up and the channel has input signal, even if the partial power-down
function is set up, DZF1-2 bits do not become ”H”.
Figure 16. DAC partial power-down example