ASAHI KASEI
[AK4589]
MS0339-E-00
2004/09
-
22
-
SWITCHING CHARACTERISTICS (ADC/DAC part and DIR/DIT part)
(Ta=25
°
C; AVDD, DVDD, PVDD=4.75
∼
5.25V; TVDD=2.7
∼
5.25V; C
L
=20pF)
Parameter Symbol
min
typ
max
Units
Control Interface Timing (4-wire serial mode)
CCLK Period
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN “
↓
” to CCLK “
↑
”
CCLK “
↑
” to CSN “
↑
”
CDTO Delay
CSN “
↑
” to CDTO Hi-Z
tCCK
tCCKL
tCCKH
tCDS
tCDH
tCSW
tCSS
tCSH
tDCD
tCCZ
200
80
80
50
50
150
50
50
45
70
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Control Interface Timing (I
2
C Bus mode)
SCL Clock Frequency
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling (Note 23)
SDA Setup Time from SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
Pulse Width of Spike Noise Suppressed by Input Filter
Capacitive load on bus
fSCL
tBUF
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
tF
tSU:STO
tSP
Cb
-
4.7
4.0
4.7
4.0
4.7
0
0.25
-
-
4.0
0
-
100
-
-
-
-
-
-
-
1.0
0.3
-
50
400
kHz
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
ns
pF
Notes:
23. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
24. I
2
C is a registered trademark of Philips Semiconductors.
Purchase of Asahi Kasei Microsystems Co., Ltd I
2
C components conveys a license under the Philips
I
2
C patent to use the components in the I
2
C system, provided the system conform to the I
2
C
specifications defined by Philips.