Arcom VIPER, Technical Manual

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VIPER Detailed hardware description
Flat panel display support
The Intel PXA255 processor contains an integrated LCD display controller that permits
1, 2, and 4-bit gray-scale, and 8 or 16-bit color pixels. A 256-byte palette RAM provides
flexible color mapping capabilities. The LCD display controller supports active (TFT)
and passive (STN) LCD displays.
The PXA255 can drive displays with a resolution up to 800x600, but as there is a
unified memory structure, the bandwidth to the application decreases significantly. If the
application makes significant use of memory, such as when video is on screen, you may
also experience FIFO under-run to the LCD causing the frames rates to drop or display
image disruption. Reducing the frame rate to the slowest speed possible gives the
maximum bandwidth to the application. The display quality for an 800x600 resolution
LCD is dependant on the compromises that can be made between the LCD refresh rate
and the application.
A full explanation of the graphics controller operation can be found in the PXA255 data
sheets included on the support CD.
The flat panel data and control signals are routed to PL3. See the section PL3 – LCD
connector , page 62 , for pin assignment and part number details.
The VIPER-FPIF1 allows the user to easily wire-up a new panel using pin and crimp
style connectors. Contact Arcom (see
Appendix A – Contacting Arcom , page 72 ) for
purchasing information.
A list of proven Flat Panel displays are included on the VIPER product page .
Click on the Flat Panel Display Options tab for up-to-date details.
The following tables provide a cross-reference between the flat panel data signals and
their function when configured for different displays.
TFT panel data bit mapping to the VIPER
Panel data bus bit 18-bit TFT 12-bit TFT 9-bit TFT
FPD 15 R5 R3 R2
FPD 14 R4 R2 R1
FPD 13 R3 R1 R0
FPD 12 R2 R0 NA
FPD 11 R1 NA NA
GND R0 NA NA
FPD 10 G5 G3 G2
FPD 9 G4 G2 G1
© 2004 Arcom Issue H
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