VIPER
Detailed hardware description
Static RAM
The VIPER has a 256KByte SRAM device fitted, arranged as 256Kbit x 8-bits. Access
to the device is on 16-bit boundaries, whereby the least significant byte is the SRAM
data and the 8-bits of the most significant byte are don’t care bits. The reason for this is
that the PXA255 is not designed to interface to 8-bit peripherals. This arrangement is
summarized in the following data bus table:
Most Significant Byte
Least Significant Byte
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4 D3 D2
D1
D0
Don’t Care
SRAM Data
The data in the SRAM can be made non-volatile by fitting an external battery to power
the device in the event of power loss on the main VIPER 5V supply. See the section
for details.
CompactFLASH
The CompactFLASH connector PL5 is interfaced to Slot 0 of the PXA255 PC card
controller, and appears in PC card memory space socket 0.
This is a hot swappable 3.3V interface, controlled by the detection of a falling edge on
GPIO32 when a CompactFLASH card has been inserted. On detection set GPIO82 to
logic ‘1’ to enable the 3.3V supply to the CompactFLASH connector. The
CompactFLASH (RDY/nBSY) signal interrupts on GPIO8.
Address Region
Name
0x2C000000 – 0x2FFFFFFF
Socket 0 Common Memory Space
0x28000000 – 0x2BFFFFFF
Socket 0 Attribute Memory Space
0x24000000 – 0x27FFFFFF
Reserved
0x20000000 – 0x23FFFFFF
Socket 0 I/O Space
© 2004 Arcom Issue H
24
