Arcam DiVA DV88, Service Manual, Page: 26 / 60

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B
C
D
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C
B
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ISSUE
DRAWING NO.
23425
DRAWING TITLE
Drawn by
DATE
Filename
ECO No. DESCRIPTION OF CHANGE
J \Change Control\ECO AGENDA\01 1139 L875PB MODS cliff\L875 4.0.ddb - Documents\ 875C3 4 0 SCH
A & R Cambridge Ltd.
Pembroke Avenue
Denny Industrial Centre
Waterbeach
Cambridge CB5 9PB
DSP BOARD - DVD PROC
Circuit Diagram
L875C3
PG
5-Sep-2001
INITIALS
Date Printed
3 5 Sheet of
Notes:
DVDDAT5
DVDDAT4
HA4
HA3
MA8
DVDDAT7
DVDDAT0
HA1
HA2
MA6
DVDDAT3
MA0
DVDDAT6
MA5
DVDDAT1
DVDDAT2
MA9 MA11 MA10
AOUT0
PYUV7
PYUV3
PYUV6
PYUV0
PYUV4
PYUV5
PYUV2
PYUV1
MA8 MA6 MA4 MA5 MA9 MA7
MA4
MA0 MA11 MA2
MCS0-
MA3
MA3 MA1
MRAS-
MA10
MCAS- MCS0- MRAS- MPCLK MA2 MA1 MA7
UV1/TDO
UV2/TDI
UV4
UV0/TCK
AOUT2
UV3/TMS
MPCLKB
MCS1-
MCS1-
MCS1-
MRAS-
MRAS-
MCAS-
MCAS- MCAS-
MA[0..10]
MA0 MA11 MA2 MA3 MA1 MA10
MA[0..10]
MWE-
MWE-
MWE-
MWE-
MA8 MA6 MA4 MA5 MA9 MA7
MDQM
MDQM
MDQM
MDQM
MDQM
MD0
MD3 MD1
+3.3V
MD9
MD11
MD5 MD1
+3.3V
MD9 MD13
MD10 MD2 MD7
MD6 MD4
MD[0..15]
MD7 MD3
MD14 MD4
MD0
MD11
+3 3V
MD[0..15]
MD[0..15]
MD5
MD15
MD7
MD10 MD13 MD12 MD12 MD8 MD15
MD3
MD14
MD6 MD2
MD14
+3.3V
MD15
MD13 MD6 MD8
MD8
MD4
MD11
MD5 MD2
+3.3V
MD1
MD10
MD0 MD0
MD9
MD12
+3 3V
HRD-
DVDVALID
MPGSTBY-
DVDSOS
DVDSTB
MPGRST-
DVDERR
DVDREQ
AOUT1
MPGIRQ-
HWR-
MPGCS-
CDERR
CDDAT
CDCLK
SPDIF
HD1
HD7
HD4
HD2
HD3
HD5
HD0
HD6
CDFRM
YUV1
YUV3
YUV5
YUV4
YUV6
YUV7
YUV0
YUV2
GND
GND
GND
GND
GND
GND
VSS
26
A4
27
A5
28
A6
29
A7
30
A8
31
A9
32
NC
33
CKE
34
CLK
35
UDQM
36
NC/VREF
37
VCC
38
DQ8
39
DQ9
40
VSS
41
DQ10
42
DQ11
43
VCC
44
DQ12
45
DQ13
46
VSS
47
DQ14
48
DQ15
49
VSS
50
VCC
1
DQ0
2
DQ1
3
VSS
4
DQ2
5
DQ3
6
VCC
7
DQ4
8
DQ5
9
VSS
10
DQ6
11
DQ7
12
VCC
13
LDQM
14
WE
15
CAS
16
RAS
17
CS
18
BS
19
A10
20
A0
21
A1
22
A2
23
A3
24
VCC
25
U10
KM416S1020BT
VSS
26
A4
27
A5
28
A6
29
A7
30
A8
31
A9
32
NC
33
CKE
34
CLK
35
UDQM
36
NC/VREF
37
VCC
38
DQ8
39
DQ9
40
VSS
41
DQ10
42
DQ11
43
VCC
44
DQ12
45
DQ13
46
VSS
47
DQ14
48
DQ15
49
VSS
50
VCC
1
DQ0
2
DQ1
3
VSS
4
DQ2
5
DQ3
6
VCC
7
DQ4
8
DQ5
9
VSS
10
DQ6
11
DQ7
12
VCC
13
LDQM
14
WE
15
CAS
16
RAS
17
CS
18
BS
19
A10
20
A0
21
A1
22
A2
23
A3
24
VCC
25
U11
KM416S1020BT
GND
121
GPAIO0
122
GPAIO1
123
VCLKX2
124
GND
125
GCLK1
126
SCNENB
127
XO
128
GCLK
129
STBY
130
GND
131
AMCLK
132
V3.3
133
GNDA
134
PLLCFG0
135
PLLCA
136
PLLCFG1
137
V3.3A
138
ICEMODE
139
V3.3
140
RESET
141
IDLE
142
CODEERR
143
CODESOS
144
GND
145
CODEVALID
146
CODESTB
147
CODEREQ
148
CODE0
149
V3.3
150
CODE1
151
CODE2
152
CODE3
153
CODE4
154
V3.3
155
CODE5
156
CODE6
157
CODE7
158
GPSO
159
GND
160
GND
81
MD0
82
TESTMODE
83
VCLK
84
VMASTER
85
V3.3
86
VDEN
87
CBLANK
88
VSYNC
89
HSYNC
90
FIELD
91
Y7
92
GND
93
Y6
94
Y5
95
Y4
96
Y3
97
V3.3
98
Y2
99
Y1
100
Y0
101
UV7
102
V3.3
103
UV6
104
UV5
105
UV4
106
UV3
107
GND
108
UV2
109
UV1
110
UV0
111
AIN
112
V3.3
113
AOUT0
114
AOUT1
115
AOUT2
116
SPDIF
117
ALRCLK
118
ABCLK
119
GND
120
GND
41
GND
1
A5
42
GPSI
2
A2
43
HD15
3
A6
44
HD14
4
A1
45
HD13
5
A7
46
HD12
6
A0
47
HD11
7
V3.3
48
V3.3
8
A8
49
HD10
9
A10
50
HD09
10
A9
51
HD08
11
A11
52
HD07
12
GND
53
GND
13
MCS0
54
HD06
14
MCS1
55
HD05
15
MRAS
56
HD04
16
PCLK
57
HD03
17
V3.3
58
V3.3
18
MCAS
59
HD02
19
MWE
60
HD01
20
MDQM
61
HD00
21
MD8
62
HA3
22
V3.3
63
GND
23
MD7
64
HA2
24
MD9
65
HA1
25
MD6
66
HA0
26
MD10
67
HWR
27
GND
68
V3.3
28
MD5
69
HCS
29
MD11
70
HRD
30
MD4
71
HRDY
31
MD12
72
HACK
32
V3.3
73
V3.3
33
MD3
74
HIRQ
34
MD13
75
HWID
35
MD2
76
HORD
36
MD14
77
HTYPE
37
MD1
78
A4
38
MD15
79
A3
39
GND
80
GND
40
U8
ZR36700
ZORANQFP160
DVDDAT[0..7]
HRD-
MPGIRQ-
HA[1..4]
+5V
GND
+3.3V
SPDIF-I34
CDCLK
CDDAT
CDFRM
CDERR
DVDERR
MPGRST-
DVDREQ
DVDVALID
DVDSOS
MPGSTBY-
DVDSTB
ASDAT0
ASDAT1
ASDAT2
ABCLK
AMCLK
ALRCLK
YUV[0..7]
MPGCS-
HWR-
HD[0..15]
CLK27
+3.3V
+3.3V
+5V
+3.3V
+3.3V
+3.3V +3.3V +3.3V
+3.3V
ZR36700 Notes:
Video Sync Master mode (36700 drives HSYNC-, VSYNC-)
In 8-bit pixel bus mode, UV[7..5] are not used; UV[4..0]
are possible inputs from an external OSD device.
pin48 pin73 pin103
PCB Note:
Keep damping resistors
close to U8
pin150 pin18 pin28
+ C24
10U EL SM + C25
10U EL SM + C26
10U EL SM
C57
100N 0805 C58
100N 0805 C59
100N 0805 C21
100N 0805 C22
100N 0805 C23
100N 0805
C27
100N 0805
C28
100N 0805 C29
100N 0805 C30
100N 0805
C20
100N 0805 C19
100N 0805
C16
100N 0805
C17
100N 0805
C15
100N 0805
L1
7F004
Y2
27MHZ SM
1
2
3
4
5
6
7
8
RP4
100R X 4 ISO
R11
100R 0805
R10
100R 0805
R26
0R0 0805
NF
AMCLK is now an INPUT
It may be an output when testing
R27
0R0 0805
R28 0R0 0805
NF
R3
75R 0805
1
2
3
5 6
7
8
4
9
10
RP5
RPACK SM 4K7 BUS
Q_49
GAIN_SCALING High for HDCD gain scaling
R30
4K7 0805
R29
0R0 0805
NF
YUV[0..7]
HA[1..4]
DVDDAT[0..7]
SDRAM 0 SDRAM 1
HSYNC-
VSYNC-
HD[0 15]
1
2
4
3
5
U14
74AHC1G00 SM
R7
1K0 0805
C45
100N 0805
+5V
LRCK_PSU
Wordclock to synchronise PSU
(was 16/9 on iss A)
GPS0 was GAIN_SCALING on isss A
HSYNC-
VSYNC-
C40
33P NPO 0805
C52
33P NPO 0805
C82
47N 0805
R1
75R 0805
CLK27PS
R37
33R 0805
MPCLK
R36
0R0 0805
1
2
3
4
5
6
7
8
RP6
100R X 4 ISO
1
2
3
4
5
6
7
8
RP7
100R X 4 ISO
Rev 2.1 - changed C40 and C52 from 22pF to 33pF
and R36 from 100R to 0R
(corrects 27MHz frequency)
Rev 2.2 - deleted ENABLE_AV
(Use MPGSTBY- for SCART control instead)
1
2
3
4
CN11
AMPCT4
Sync connector for progressive scan board
NOT FITTED
01_1139 CL 08/08/01 REMOVED CN2 & CN3, PCB WIDTH CHANGED 4.0