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2
3
4
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8
A
B
C
D
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C
B
A
ISSUE
DRAWING NO.
23425
DRAWING TITLE
Drawn by
DATE
Filename
ECO No.
DESCRIPTION OF CHANGE
J \Change Control\ECO AGENDA\01 1139 L875PB MODS cliff\L875 4.0.ddb - Documents\ 875C2 4 0 SCH
A & R Cambridge Ltd.
Pembroke Avenue
Denny Industrial Centre
Waterbeach
Cambridge CB5 9PB
DSP BOARD CPU
Circuit Diagram
L875C2
PG
5-Sep-2001
INITIALS
Date Printed
2
5
Sheet
of
Notes:
FPSEL
FPDIN
C161-P80
RAM-P30
RAM-P30
RAM-P12
RAM-P12
ROMCS-
HWR-
ROM-P1
RAMCS-
RAMCS-
HWRH-
ROMCS-
ROM-P1
ROMCS-
HWRH-
HWR-
HWR-
HWR-
HWRH-
HWRH-
HWRH-
RAM-P30
HRD-
HRD-
HRD-
HRD-
HRD-
HRD-
RAM-P12
ROM-P1
ROMCS-
HALE
RAMCS-
HD13
HD11
HD10
HD13
HD[0..15]
HD[0..15]
HD13
HD3
HD7
HD12
HD15
HD2
HD2
HD5
HD5
HD0
HD1
HD8
HD10
HD15
HD4
HD1
HD9
HD14
HD9
HD11
HD5
HD0
HD15
HD14
HD1
HD1
HD0
HD0
HD6
HD9
HD12
HD13
HD11
HD[0..15]
HD14
HD7
HD7
HD4
HD2
HD3
HD3
HD10
HD6
HD12
HD14
HD8
HD5
HD3
HD8
HD[0..15]
HD4
HD6
HD2
HD4
HD[0..15]
HD6
HD8
HD15
HD11
HD12
NMI-
TXD
RXD
SSC-SCLK
SSC-MRST
SSC-MTSR
HA[1..19]
HA[1..19]
HA19
HA13
HA8
HA5
HA3
HA3
HA1
HA1
HA[1..19]
HA[1..19]
HA9
HA19
HA16
HA14
HA2
HA15
HA15
HA18
HA11
HA11
HA11
HA2
HA2
HA7
HA9
HA18
HA4
HA12
HA5
HA3
HA16
HA14
HA17
HA1
HA10
HA7
HA6
HA12
HA12
HA13
HA9
HA15
HA18
HA4
HA12
HA1
HA1
HA15
HA4
HA17
HA13
HA13
HA19
HA10
HA3
HA14
HA7
HA17
HA11
HA8
HA5
HA3
HA16
HA16
HA18
HA18
HA6
HA6
HA4
HA4
HA5
HA14
HA16
HA10
HA10
HA2
HA15
HA6
HA11
HA14
HA8
HA17
HA5
HA[1..4]
HA14
HA2
HA7
HA6
HA13
HA8
HA9
HA9
HA10
HA12
HA17
HA8
HA3
HA2
HA7
HA4
HA1
HA15
HD7
FPCLK
FPDOUT
RAMCS-
MPGIRQ-
RIRQ-
MPGCS-
RESET-
DRV RQ-
GND
+5V
GND
+5V
+5V
GND
+5V
SCL
SDA
PLCC-32-SMT
PLCC-32-SMT
A0
12
A2
10
A3
9
A4
8
A1
11
A5
7
A6
6
A8
27
A9
26
A10
23
A11
25
A12
4
A13
28
A14
3
A15
31
A16
2
A17
30
A18
1
CE
22
RD
24
WR
29
D0
13
D1
14
D2
15
D3
17
D4
18
D5
19
D6
20
D7
21
VCC
32
GND
16
A7
5
U7
SRAM
SOJ-32-300-400
A0
12
A2
10
A3
9
A4
8
A1
11
A5
7
A6
6
A8
27
A9
26
A10
23
A11
25
A12
4
A13
28
A14
3
A15
31
A16
2
A17
30
A18
1
CE
22
RD
24
WR
29
D0
13
D1
14
D2
15
D3
17
D4
18
D5
19
D6
20
D7
21
VCC
32
GND
16
A7
5
U6
SRAM
SOJ-32-300-400
FPDOUT
FPCLK
RESET-
FPDIN
FPSEL
TXD
RXD
MPGCS-
MPGIRQ-
GND
+5V
HRD-
HWR-
HA[1..4]
IRIRQ-
SCL
HD[0..15]
DRVIRQ-
MUTE
MPGSTBY-
MPGRST-
SSC-SCLK
SSC-MTSR
SSC-MRST
SSC-ATN-
SDA
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
C1610 Configuration Note:
HD6 = 0 Demultiplexed Bus
HD7 = 1 16-bit Data Bus
HD8 = 0 WRH- and WRL- control
HD[12:11] = 00b 1Mbyte segment length (A0...A19)
HD15 = 0 CLK divide by 1
HD[9:10]=00b CS3 is GPIO(HRST)
RAM Configuration Note:
Device RAM-P12 RAM-P30
Depth (A0) (A17)
/Width
128Kx16: HA17 VCC (Default)
512Kx16: HA19 HA17
P5.14-15 is read-only inp
PROM Configuration Note:
Depth/Width ROM-P1
256Kx16 N/C
512Kx16 A18
PCB Note:
Provide clearance around PROM
for SMT Sockets
PCB Note:
Stretch RAM pads to
accomodate both 300mil
and 400mil wide devices.
MPGRST- is low after
reset.
MPGRST- must be set high
to access MPEG chip.
P1H.6/A14
61
P1H.7/A15
62
Vss
63
Vcc
64
RSTIN
65
RSTOUT
66
NMI
67
P6.0/CS0
68
P6.1/CS1
69
P6.2/CS2
70
P6.3/CS3
71
P2.9/EX1IN
72
P2.10/EX2IN
73
P2.11/EX3IN
74
P2.12/EX4IN
75
P2.13/EX5IN
76
P2.14/EX61N
77
P2.15/EX7IN
78
P5.14/T4EUD
79
P5.15/T2EUD
80
AD10
41
AD11
42
AD12
43
AD13
44
AD14
45
AD15
46
A0
47
A1
48
A2
49
A3
50
A4
51
A5
52
A6
53
A7
54
A8
55
A9
56
A10
57
A11
58
A12
59
A13
60
AD0
29
AD1
30
AD2
31
P4.0/A16
17
AD3
32
AD4
33
AD5
34
P3.5/T4IN
8
Vss
21
AD6
35
Vcc
22
AD7
36
P4.4/A20
23
P4.1/A17
18
P4.5/A21
24
RD
25
P4.2/A18
19
WR/WRL
26
P3.6/T3IN
9
ALE
27
P4.3/A19
20
EA
28
Vcc
37
P3.7/T2IN
10
Vss
38
AD8
39
AD9
40
Vss
1
XTAL1
2
XTAL2
3
Vcc
4
P3.2/CAPIN
5
P3.3/T3OUT
6
P3.4.T3EUD
7
P3.8/MRST
11
P3.9/MTSR
12
P3.10/TxD0
13
P3.11/RxD0
14
P3.12/BHE/WRH
15
P3.13/SCLK
16
U3
C1610
1
2
3
5
6
7
8
4
9
10
RP1
RPACK SM 4K7 BUS
1
2
3
5
6
7
8
4
9
10
RP2
RPACK SM 4K7 BUS
1
2
3
5
6
7
8
4
9
10
RP3
RPACK SM 4K7 BUS
+
C12
10U EL SM
+
C13
10U EL SM
+
C14
10U EL SM
C5
100N 0805
C4
100N 0805
C10
100N 0805
C9
100N 0805
C6
100N 0805
C8
100N 0805
C7
100N 0805
C11
100N 0805
Gnd
1
Res
2
Vcc
3
DS1233
Gnd
4
U1
DS1233 SM
C86
100N 0805
EEPROM is now 32K x 8
Y1
16MHZ SM
R5
100R 0805
R6
4K7 0805
R63
4K7 0805
R61
10K 0805
R4
4K7 0805
R2
0R0 0805
R12
0R0 0805
R13
0R0 0805
R14
0R0 0805
R15
0R0 0805
NF
NF
FSEL0
FSEL1
Q2
6
Q5
15
Q6
16
Q3
9
D0
3
D1
4
D2
7
D3
8
OE
1
CLK
11
Q1
5
Q0
2
Q4
12
Q7
19
D4
13
D5
14
D6
17
D7
18
U12A
74HC374 SM
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
CS_EXT
MD
MC
ML_8716_L
ML_8716_R
ML_8716_X
HRST
5 wire serial I/F
(controls 3 DACs)
Drive reset
C39
100N 0805
20
10
U12B
74HC374 SM
+5V
HA1
HA2
HA3
HA4
HD9,10 removed for iss B
R35
10K 0805
16/9
Control for SCART
C2
22P NPO 0805
C3
22P NPO 0805
C1
1N 0805
R38
4K7 0805
Resistor on TXD line added on rev 3.0
For static protection
A0
1
A1
2
A2
3
VSS
4
SDA
5
SCL
6
WP
7
VDD
8
U2
24LC256 SM
D0
13
A8
27
D1
14
A0
12
D2
15
A9
26
D3
17
A1
11
D4
18
A10
23
D5
19
A2
10
D6
20
A11
25
D7
21
A3
9
A12
4
A4
8
A13
28
A5
7
A14
29
A6
6
A15
3
A7
5
A16
2
CE
22
OE
24
A18/VPP
1
WE/PGM
31
VCC
32
GND
16
A17
30
U5
ROM PLCC
D0
13
A8
27
D1
14
A0
12
D2
15
A9
26
D3
17
A1
11
D4
18
A10
23
D5
19
A2
10
D6
20
A11
25
D7
21
A3
9
A12
4
A4
8
A13
28
A5
7
A14
29
A6
6
A15
3
A7
5
A16
2
CE
22
OE
24
A18/VPP
1
WE/PGM
31
VCC
32
GND
16
A17
30
U4
ROM PLCC
01_1139
CL
08/08/01
REMOVED CN2 & CN3, PCB WIDTH CHANGED
4.0
Summary of Contents for DiVA DV88
Page 1: ...DV88 DiVA DV88 DVD Player Progressive Scan Service Manual ARCAM Issue 2 0 ...
Page 19: ...Diagram 2 points to solder to on DSP board ...
Page 41: ...CAM Products 2000 TM L875pb 4 GTO ...
Page 42: ......
Page 43: ......
Page 44: ......