UG-477
Evaluation Board User Guide
Rev. A | Page 18 of 28
VDD SEL
Battery Input
1V8
3V3
Plane Decoupling
1.5 V Maximum
PWR SEL
USB/EXT
BATT
R28
162 k
C30
0.10 u F
C28
0.10 u F
C27
10 u F
2
1
3
J2
RAPC722 X
C31
10 u F
J5
R1
100 R
R27
374 k
TP2
TP7
TP6
R25
10 k0
C29
0.10 u F
D1
Gree n Diffu sed
R26
137 k
S1
SPD T
C20
0.10 u F
C21
0.10 u F
C47
0.10 u F
C48
0.10 u F
D2
D3
J10
TP4
TP3
TP1
1
VIN
2
E N
6
VOU T
5
SW
3
FB
7
E
P
4
G
N
D
U 4
ADP 1607 ACPZ -R7
L1
2.2u H
3
E N
2
GND
1
IN
5
OU T
4
BYP
U 3
ADP 1713 AU JZ-1.5-R7
C26
10 u F
C23
10 n F
B
A
J3
C24
VDD
BRD_RE SE T
U SB _5 V
IOVDD
E XT_5 V
1
1023-
053
Figure 54.
Evaluation Board Schematic—Power Supply
Control Port Interface
1
3
5
7
9
2
4
6
8
10
J1
HEADER_10WAY_POL
R15
2k67
R14
2k67
C22
0.10uF
R19
OPEN
R16
OPEN
R17
OPEN
R22
OPEN
R21
OPEN
R20
OPEN
R23
10k0
R18
10k0
IOVDD
BRD_RESET
ADDR0/CLATCH
SCL/CCLK
SDA/COUT
ADDR1/CDATA
IOVDD
IOVDD
USB_5V
1
1023-
054
Figure 55.
Evaluation Board Schematic—Control Port Interface