EVAL-ADM1075MEBZ User Guide
UG-548
Rev. A | Page 5 of 16
EVAL-ADM1075MEBZ
The
is shown in Figure 3.
Thick wires should be used between the power supply and the
board connector to minimize inductance.
The D_PWRGD LED illuminates green after the board is powered
and the
GATE pin is high (FET fully enhanced).
Pressing the RESTART push-button triggers a shutdown that
lasts for 10 sec.
The board is intended to be plugged into a system where load
capacitance already exists. Two through-hole vias are provided
to allow the placement of a load capacitor on the board when
testing the board outside of a real system. All testing performed
on the board was done with a 330 μF load capacitor.
uses a 470 nF timer capacitor to
maintain a 10 ms FET safe operating area. The undervoltage
and overvoltage thresholds were set using resistor dividers to
achieve the values shown in Table 1. A resistor divider was also
used on the ISET pin to set the current limit to approximately
15 A. The constant power level was set to the maximum allowable
level for the FET safe operating area to allow power-up in one
attempt. These values can all be fine-tuned further if necessary.
Isolation is required in most −48 V applications because there is
a large ground potential difference between the −48 V section
of the board and a PC or microcontroller.
Board
Specifications
Table 1.
Parameter Min
Typ
Max
Unit
Undervoltage Rising Threshold, V
UVH
−34.0 −35.0 −36.0 V
Undervoltage Falling Threshold, V
UVL
−30.6 −31.5 −32.4 V
Overvoltage Rising Threshold, V
OVR
−70.3 −72.4 −74.6 V
Overvoltage Falling Threshold, V
OVF
−68.9 −71.4 −74.0 V
Trip
Current
12.1 12.75
13.4 A
Regulation
Current
12.9 13.3 13.8 A
Constant
Power
Level
127 135 142 W
1
141
4-
003