background image

EVAL-ADG5248FEBZ User Guide 

UG-835 

 

Rev. A | Page 5 of 14 

EVALUATION BOARD HARDWARE 

Evaluate the operation of the 

ADG5248F

 using the 

EVAL-

ADG5248FEBZ

. Figure 1 shows a typical evaluation setup 

where only a power supply and signal generator are required. 
Figure 2 shows the block diagram of the main components of 
the evaluation board. 
Using this evaluation board, the 

ADG5248F

 passes signals from 

either the source or drain connectors. The source pins have fault 
detection circuitry that react to an overvoltage event. During an 
overvoltage event, the channel where the fault occurs turns off, 
and the FF pin pulls low. The SF pin pulls low when the A0/F0, 
A1/F1, and EN/F2 pins select the source where the overvoltage 
occurs. See the 

ADG5248F

 data sheet for more details. 

POWER SUPPLY 

Connector J3 provides access to the supply pins of the 

ADG5248F

. The VDD, GND, and VSS screw terminals link to 

the appropriate pins on the 

ADG5248F

. For dual supply voltages, 

power the evaluation board from ±5 V to ±22 V. For single supply 
voltages, connect the GND and V

SS

 terminals together, and power 

the evaluation board with 8 V to 44 V. Additionally, an on-board 
LDO regulator is provided for digital control voltage. If necessary, 
connect a secondary voltage source to EXT_VL to control the 
digital voltages. To use EXT_VL, move the 0 Ω resistor from 
R20 to R21. Do not expose the on-board LDO regulator to 
voltages greater than 28 V; remove R18 and supply an 
alternative digital voltage via EXT_VL if required. 

INPUT SIGNALS 

Two screw connectors provide access to the source and drain 
pins of the 

ADG5248F

. Additional Subminiature Version B (SMB) 

connector pads are available if extra connections are required. The 

ADG5248F

 is overvoltage protected on the source side, and each 

source terminal (S1 to S8) can be presented with a voltage of up to 
+55 V or −55 V. See the 

ADG5248F

 data sheet for more details. 

Each trace on the source and drain side includes two sets of 
0603 pads, which can be used to place a load on the signal path 
to ground. A 0 Ω resistor is placed in the signal path and can be 
replaced with a user defined value. The resistor combined with 
the 0603 pads create a simple resistor capacitor (RC) filter. 
The 

ADG5248F

 uses a parallel interface to control the operation of 

the switches. The switch operation can be manually controlled 
using the SW1 to SW4 switches, or an external controller can be 
interfaced directly to the control pins by using the SMB connectors 
(EN/F2, A0/F0, A1/F1, and A2) and removing the 0 Ω R54 to 
R57 resistors. 

OUTPUT SIGNALS 

There are two outputs on the 

ADG5248F

. The FF pin indicates 

when the device is operating normally or whether there is an 
overvoltage fault on one of the source pins. The SF pin also 
indicates when an overvoltage occurs on one of the source pins 
and transitions low only when an overvoltage occurs on the 
channel selected by the A0/F0, A1/F1, and EN/F2 inputs. 
For visual indication, LEDs are mounted on the evaluation board. 
When the device is operating normally, the FF and SF pins remain 
high and LED1 and LED3 illuminate green. If an overvoltage 
occurs at any of the source pins, the FF pin pulls low and LED2 
illuminates red. If an overvoltage occurs at the source pin selected 
by A0/F0, A1/F1, and EN/F2, the SF pin pulls low and LED4 
illuminates red. 
SMB connectors interface the evaluation board with external 
controllers. 

 

Summary of Contents for EVAL-ADG5248FEBZ

Page 1: ...al source Method to measure voltage suchas a digital multimeter DMM GENERAL DESCRIPTION The EVAL ADG5248FEBZ is the evaluation board for the ADG5248F featuring an overvoltage protected 8 1 multiplexer The ADG5248F has overvoltage detection and protection circuitry on the source pins and is protected against signals up to 55 V and 55 V in both the powered and unpowered states Figure 1 shows the EVA...

Page 2: ... Board Connection Diagram 3 Getting Started 4 Evaluation Board Setup Procedure 4 Evaluation Board Hardware 5 Power Supply 5 Input Signals 5 Output Signals 5 Jumper Settings 6 Switches and 0 Ω Resistors 6 SMB Connectors 6 Evaluation Board Schematics and Artwork 7 Bill of Materials 13 REVISION HISTORY 5 2016 Rev 0 to Rev A Changes to Figure 2 4 Changes to Table 1 6 7 2015 Revision 0 Initial Version ...

Page 3: ...ADG5248FEBZ User Guide UG 835 Rev A Page 3 of 14 EVALUATION BOARD CONNECTION DIAGRAM 13184 001 Figure 1 The EVAL ADG5248FEBZ on the Lower Right Power Supply on the Top Right and Signal Generator on the Left ...

Page 4: ...ality test as follows 1 Connect a power supply to J3 Connect VSS and GND together if a single supply is required 2 Ensure a 0 Ω resistor is inserted in R18 to use the on board LDO regulator and that a 0 Ω resistor inserts into R20 SW1 through SW4 control the digital signals for the ADG5248F 3 LED1 and LED3 illuminate green to indicate that the multiplexer is operating normally ADP7142 LDO FAULT DE...

Page 5: ...248F Additional Subminiature Version B SMB connector pads are available if extra connections are required The ADG5248F is overvoltage protected on the source side and each source terminal S1 to S8 can be presented with a voltage of up to 55 V or 55 V See the ADG5248F data sheet for more details Each trace on the source and drain side includes two sets of 0603 pads which can be used to place a load...

Page 6: ... R14 R36 R47 and R48 connect the LEDs to the digital power supply R37 and R50 connect the FF and SF pins of the ADG5248F to the LED controls Resistors R34 R39 and R41 configure POSFV to either the voltage present on POSFV on J4 VDD or VL Resistors R35 R40 and R42 configure NEGFV to either VSS the voltage present on NEGFV on J4 or GND SMB CONNECTORS The SW1 to SW4 switches allow the user to manuall...

Page 7: ...EVAL ADG5248FEBZ User Guide UG 835 Rev A Page 7 of 14 EVALUATION BOARD SCHEMATICS AND ARTWORK 13184 003 Figure 3 ADG5248F Evaluation Board Schematic Part 1 ...

Page 8: ...UG 835 EVAL ADG5248FEBZ User Guide Rev A Page 8 of 14 13184 004 Figure 4 ADG5248F Evaluation Board Schematic Part 2 ...

Page 9: ...EVAL ADG5248FEBZ User Guide UG 835 Rev A Page 9 of 14 13184 005 Figure 5 ADG5248F Evaluation Board Schematic Part 3 ...

Page 10: ...UG 835 EVAL ADG5248FEBZ User Guide Rev A Page 10 of 14 13184 006 Figure 6 EVAL ADG5248FEBZ Silk Screen 13184 007 Figure 7 EVAL ADG5248BFEBZ Top Layer ...

Page 11: ...EVAL ADG5248FEBZ User Guide UG 835 Rev A Page 11 of 14 13184 008 Figure 8 EVAL ADG5248FEBZ Layer 2 13184 009 Figure 9 EVAL ADG5248FEBZ Layer 3 ...

Page 12: ...UG 835 EVAL ADG5248FEBZ User Guide Rev A Page 12 of 14 13184 010 Figure 10 EVAL ADG5248FEBZ Bottom Layer ...

Page 13: ... 0805 KP 2012SGC FEC 1318243 LED2 LED4 LEDs SMD red 0805 KP 2012SRC PRV FEC 1318244 Q1 to Q4 Transistors N MOSFET 60V 0 23 A SOT 23 BSS138N FEC 115 6434 R1 to R3 R7 to R9 R12 R13 R16 R19 R23 R28 R37 R49 R50 R54 to R57 Resistors 0603 1 0 Ω MC0063W06030R FEC 9331662 R4 to R6 R10 R11 R17 R22 R24 to R27 R29 R30 to R33 R43 to R45 SMD resistors 0603 Not applicable Do not insert R14 R36 R47 R48 Resistors...

Page 14: ...party for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board...

Reviews: