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UG-949 

EVAL-AD7761FMCZ User Guide 

 

Rev. 0 | Page 8 of 17 

POWER SUPPLIES 

The evaluation board requires that an external power supply, 
either a bench top supply or a wall wart (dc plug) supply, be 
applied to J1 or J3 (see Table 3 for more information). Linear 
regulators generate the required power supply levels from the 
applied V

IN

 rail. The regulators used are the 5 V 

ADP7118

 (U1 

and U7), which supply AVDD1, the on-board amplifiers and 
reference, and the 3.3 V 

ADP7118

 (U16), which delivers 3.3 V 

to the IOVDD pin of the 

AD7761

.  

SERIAL DATA INTERFACE 

The 

AD7761

 evaluation board outputs conversion results to the 

EVAL-SDP-CH1Z

 via the eight data output pins, DOUT0 to 

DOUT7. The serial data interface also includes signals such as 
SCLK, DCLK, and DRDY (all are outputs). 

SERIAL CONFIGURATION INTERFACE  

The 

AD7761

 is configured by the 

EVAL-SDP-CH1Z

 via a  

4-wire SPI interface. SL1 must be shorted to Position A for this 
mode to be active. 

POWERING DOWN THE SYSTEM DEMONSTRATION 

PLATFORM 

When disconnecting the SDP-H1 evaluation platform and 
powering down the system, first exit the evaluation software. 
Then, press the reset button on the 

EVAL-SDP-CH1Z

 board 

before disconnecting the 12 V supply and then the USB. 
Failure to follow this procedure can cause damage to the  

EVAL-SDP-CH1Z

 board. 

 

 

Table 3. 

AD7761

 Power Supply

1

 

Power Supply 

(V

IN

) Source 

Voltage Range 

Function 

J1 

7 V to 9 V 

Wall wart (dc plug) supply to the evaluation board. Supplies LDOs that create 5 V and 3.3 V 
rails. It also supplies the 

ADR444

 external reference. Ensure that both LK1 and LK2 are set to 

Position B when the external power supply is applied to this connector. 

J2 

Apply voltage within 

data sheet specified 
ranges and GND (0 V) 

Apply voltage within data sheet specified ranges and GND (0 V) to this connector to power 

the evaluation board. J2 is the connector for supplying AVDD1, AVDD2, IOVDD, AVSS, and 
AGND externally. SLP1, SLP2, and SLP4 must be adjusted accordingly. See Table 1 for details. 

J3 

7 V to 9 V 

Bench top supply to the evaluation board. Supplies LDOs that create 5 V and 3.3 V rails. It also 

supplies the 

ADR444

 external reference and on-board amplifiers. Ensure that LK1 is set to 

Position A when the external power supply is applied to this connector and LK2 is set to 
Position B. 

EVAL-SDP-CH1Z

 

12 V 

If using the 

EVAL-SDP-CH1Z

, power can be taken from this board and supplied to the LDOs. 

Set LK2 to Position A. 

 

1

 Only a single supply is required. 

 

 

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Summary of Contents for EVAL-AD7761FMCZ

Page 1: ...supply DC ac signal source Audio Precision or similar high performance signal source USB cable PC running Windows with USB 2 0 port GENERAL DESCRIPTION The EVAL AD7761FMCZ evaluation kit features the AD7761 16 bit 256 kSPS analog to digital converter ADC A 7 V to 9 V external bench top supply is regulated to 5 V and 3 3 V to supply the AD7761 and support components The EVAL AD7761FMCZ board connec...

Page 2: ...re 5 Device Description 5 Hardware Link Options 5 Power Supplies 8 Serial Data Interface 8 Serial Configuration Interface 8 Powering Down the System Demonstration Platform 8 Sockets Connectors 9 Evaluation Board Setup Procedures 9 Evaluation Board Software 10 Software Installation Procedures 10 Setting up the System for Data Capture 13 Software Operation 14 REVISION HISTORY 4 16 Revision 0 Initial...

Page 3: ...the EVAL AD7761FMCZ evaluation board via the supplied 9 V dc adapter at J1 LK1 in Position B Alternatively supply an external voltage in the range of 7 V to 9 V from a bench top power supply using the J3 connector LK1 in Position A 5 Connect the 12 V dc supply to the EVAL SDP CH1Z board and then connect to the PC using the supplied USB cable For Windows XP the PC may need to search for the EVAL SD...

Page 4: ...source impedances Use the on board common mode voltage source on the AD7761 to bias the input signal The default condition is VCM AVDD1 AVSS 2 TERMINAL BLOCKS J8 J13 J8 CH7 B DIRECT TO ADC INPUT TO ADC INPUT VIA ADA4896 2 G 1 DEFAULT 8 ADA4896 2 TO ADC INPUT VIA ADA4896 2 G 1 SOLDER LINKS SL5 1 SL5 1 FOR CHANNEL 5 ONLY DIRECT TO ADC INPUT ADC DATA 32MHz CLOCK A SOLDER LINK TYPES TO ROUTE ANALOG IN...

Page 5: ...s from the on board low dropout regulators LDOs which generate their input voltage from J1 or J3 depending on the setting of LK1 Alternatively the board can be powered by setting LK2 to Position A when used in conjunction with the EVAL SDP CH1Z see Table 3 for details Table 1 Default Link and Solder Link Options Link No Default Option Description LK1 A LK1 selects the input voltage source Position...

Page 6: ...ling filter Position C wideband low ripple filter SL15 A Select common mode voltage to bias input signals to one of the following Position A OP2177 buffered VCM output Position B VCM output from the AD7761 SL16 B Select reference path from the ADR444 to REFX Position A bypass the external reference buffer Position B ADR444 input into the ADA4841 1 reference buffer SL17 B Select reference path from...

Page 7: ...mplifier driver board header via the J11 and J12 connectors On Board Connectors Table 2 provides information about the external connectors on the EVAL AD7761FMCZ Table 2 On Board Connectors Connector Function J1 Wall wart dc plug power supply voltage input Apply 7V to 9V and GND 0V to this connector to power the evaluation board J2 Connector for supplying AVDD1 AVDD2 IOVDD AVSS and AGND externally...

Page 8: ...llow this procedure can cause damage to the EVAL SDP CH1Z board Table 3 AD7761 Power Supply1 Power Supply VIN Source Voltage Range Function J1 7 V to 9 V Wall wart dc plug supply to the evaluation board Supplies LDOs that create 5 V and 3 3 V rails It also supplies the ADR444 external reference Ensure that both LK1 and LK2 are set to Position B when the external power supply is applied to this con...

Page 9: ...o Channel 5 7 way 2 54 mm TH header Samtec TLW 107 05 G S Farnell 1668499 J13 J14 8 pin connector for input to Channel 0 to Channel 3 8 pin socket terminal block 3 81 mm pitch Phoenix Contact MC 1 5 8 G 3 81 Farnell 3704774 J15 Unpopulated VCM SMA connector Straight PCB mount SMB SMA jack Tyco 1 1337482 0 Farnell 3704737 AI0 to AI7 Analog input SMA positive terminals for Channel 0 to Channel 7 Str...

Page 10: ... CD ROM drive 2 Double click the setup exe file to begin the evaluation board software installation The software is installed to the following default location C Program Files Analog Devices AD7761 3 A dialog box appears requesting permission to allow the program to make changes to the PC Click Yes 14323 003 Figure 3 Evaluation Board Software Installation Granting Permission for Program to Make Ch...

Page 11: ...e For users running Windows 8 1 and Windows 10 an internet connection is required A dialog box appears such as the one shown in Figure 8 Click Download and install this feature to enable correct installation of the software 14323 108 Figure 8 Evaluation Board Software Installation Windows 8 1 and Windows 10 Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded fr...

Page 12: ...ocation for Drivers Installation 3 Click Install to confirm that you want to install the drivers 14323 010 Figure 11 SDP Drivers Setup Granting Permission to Install Drivers 4 To complete the drivers installation click Finish which closes the installation wizard 14323 011 Figure 12 SDP Drivers Setup Completing the Drivers Setup Wizard 5 Before using the evaluation board you must restart your compu...

Page 13: ...3 013 Figure 14 Device Manager Checking That the Board Is Connected to the PC Correctly Launching the Software After completing the steps in the Setting up the System for Data Capture section launch the AD7761 software as follows 1 From the Start menu click Programs Analog Devices AD7761 Evaluation Software The main window of the software then displays 2 If the AD7761 evaluation system is not conn...

Page 14: ...mples control MCLK The MCLK Hz control in the Configuration tab must match the frequency of the ADC clock source VREF The Ext REF V box in the Configuration tab control must match the reference voltage of the ADC ADC Reset Clicking ADC Reset in the Configuration tab sends a reset command to the ADC via the SPI and resets the device to its default configuration Header Data The Header Data area show...

Page 15: ...n is given beneath the graph for the analysis channel selected 14323 121 Figure 19 Waveform Tab FFT Tab The FFT tab shows a frequency domain graph of the sampled data Controls beneath the graph allow zooming and panning and control over amplitude and frequency scaling Frequency and amplitude information is given beneath the graph for the selected analysis channel 14323 120 Figure 20 FFT Tab Histog...

Page 16: ...EVAL SDP CH1Z SDP H1 controller board 12 V power supply for the EVAL SDP CH1Z 9 V power supply for the EVAL AD7761FMCZ To sample and analyze the data take the following steps 1 Connect the evaluation board to the SDP H1 board 2 Set both LK1 and LK2 to Position B on the evaluation board 3 Power up both boards and then connect the SDP H1 board to the PC via the USB cable supplied 4 Start the AD7761 ...

Page 17: ...idential and proprietary information of ADI Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Eval...

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