EVAL-AD5761RSDZ
User Guide
UG-1151
Rev. 0 | Page 5 of 17
Table 2. Link Options
Link No.
Description
LK2
This link selects the 5 V single voltage from the Blackfin on the SDP-B controller board to supply the
ADP5070
switching
regulator.
An inserted link selects the 5 V voltage supply sourced from the SDP-B.
A removed link does not select the 5 V voltage supply sourced from the SDP-B.
LK7
This link selects the voltage measured before the regulation stage (at the V+ test point).
An inserted link selects a voltage of 21.1 V.
A removed link selects a voltage of 23.2 V.
LK8
This link selects the voltage measured before the regulation stage (at the V− test point).
An inserted link selects a voltage of −11 V.
A removed link selects a voltage of −13 V.
LK14
This link selects whether the ENx pins of the
ADP5070
are connected to Resistor R40.
An inserted link disables the outputs of the
ADP5070
switching regulator and avoids unexpected noise to be coupled to the
power solution.
A removed link enables the outputs of the
ADP5070
switching regulator.
LK_AVDD
This link selects the voltage source for the positive analog supply, V
DD
.
Position A selects the source from the positive voltage generated by the
ADP5070
and adjusted by an
ADP7142
regulator.
Note that Link LK7 must be inserted to avoid surpassing the absolute maximum ratings of the
AD5761R
DAC.
Position B selects the source from the positive voltage generated by the
ADP5070
when the link is shorted to
Position B. If the link is shorted to Position A, the source comes from an externally applied voltage at +VS of J4.
LK_AVSS
This link selects the voltage source for the negative analog supply, V
SS
.
Position A selects the source from the negative voltage generated by the
ADP5070
and adjusted by an
ADP7182
regulator.
Note that Link LK8 must be inserted to avoid surpassing the Absolute Maximum Ratings of the
AD5761R
DAC.
Position B selects the source from the negative voltage generated by the
ADP5070
when the LK_VOUT− link is shorted to
Position B. If the LK_VOUT− link is shorted to Position A, the source comes from an externally applied voltage at −VS of J4.
LK_DVCC
This link selects the source of the digital power supply, DV
CC
.
Position A selects the source from the positive voltage generated by the
ADP5070
and adjusted by an
ADP7142
regulator.
Note that Link LK7 must be inserted to avoid surpassing the Absolute Maximum Ratings of the
AD5761R
DAC.
Position B selects the source from the USB port bus or alternatively from an externally applied voltage at the PVIN_3V–15V
connector.
LK_REF
This link selects the source of the external reference voltage.
Position A selects the source from the on-board
ADR4525
reference.
Position B selects the source from the voltage applied to the VREFIN/VREFOUT connector.
This link selects the voltage source for the positive analog supply, V
DD
, at the preregulation stage.
Position A selects the source from the voltage externally applied at +VS of J4.
Position B selects the source from the positive voltage generated by the
ADP5070
.
LK_VOUT-
This link selects the voltage source for the positive analog supply, V
SS
, at the preregulation stage.
Position A selects the source from the voltage externally applied at −VS of J4.
Position B selects the source from the negative voltage generated by the
ADP5070
.
SL6
This link selects the
ADP5070
VPOS/VNEG start-up sequence control.
An open link selects a manual startup.
Position A selects a sequenced startup.
Position B selects a simultaneous startup.
SL9
This link selects the
ADP5070
frequency setting and synchronization input.
An open link and an external clock connected to SYNC_IN synchronizes the switching frequency.
Position A sets the switching frequency to 1.2 MHz.
Position B sets the switching frequency to 2.4 MHz.
SL10
This link selects the
ADP5070
driver stage slew rate control.
An open link selects the fastest slew rate.
Position A selects the slowest slew rate.
Position B selects a normal slew rate.
