Analog Devices ADV7619 Reference Manual Download Page 1

 

ADV7619 Reference Manual 

  

 

ADV7619 Required Settings Manual 

 

 

 

Rev. 1.8 | Page 1 of 14 

 

INTRODUCTION 

This document describes the ADI register settings and adjustments required for the ADV7619. This document must be used in conjunction 
with the latest versions of UG-237: ADV7619 Reference Manual, the ADV7619 Software Manual and the ADV7619 scripts file.  

LEGAL TERMS AND CONDITIONS  

 

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for 

its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or 
otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective 
owners. Information contained within this document is subject to change without notice. Software or hardware provided by Analog Devices 
may not be disassembled, decompiled or reverse engineered. Analog Devices’ standard terms and conditions for products purchased from 
Analog Devices can be found at: 

http://www.analog.com/en/content/analog_devices_terms_and_conditions/fca.html

 

 

Figure 1. ADV7619 Block Diagram 

 
 
 

 

TMDS

DDC

TMDS

DDC

COMPONENT

PROCESSOR

HS/VS

FIELD/DE

CLK

DATA

I

2

S

S/PDIF

DSD

HBR

MCLK

HS

VS/FIELD

DE

AUDIO

OUTPUT

MCLK

SCLK

CLK

36-/48-BIT

OUTPUT BUS

SCLK

LRCLK

36

48

O

UT

P

UT

 M

UX

O

UT

P

UT

 M

UX

HDMI1

HDMI2

ADV7619

09580-

001

FAST

SWITCH

HDCP

KEYS

DEEP

COLOR

HDMI Rx

Summary of Contents for ADV7619

Page 1: ...is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners Information contained within...

Page 2: ...gs 5 2 1 Input Video Pixel Clock Frequency 170MHz 5 2 2 Input Video Pixel Clock Frequency 170MHz 6 3 TMDS Equalizer Settings 7 3 1 Input Video Pixel Clock Frequency 170MHz 7 3 2 Input Video Pixel Cloc...

Page 3: ...ed to TOTAL_LINE_LENGTH 2 12 14 Revision 1 5 to 1 6 Updated overall format of the document Section 1 1 Recommended I2C Addresses renamed Section 1 ADV7619 I2C addresses and content updated Section 1 2...

Page 4: ...A 6C EDID Map Address set to 0x6C 98 FB 68 HDMI Map Address set to 0x68 98 FD 44 CP Map Address set to 0x44 The I2 C addresses are programmed in the IO Map at the registers shown above The ADV7619 IO...

Page 5: ...OCK FREQUENCY 170MHZ The following two categories of settings are required for input video resolutions with a pixel clock of less than or equal to 170 MHz 2 1 1 480i 576i 480p and 576p Resolutions up...

Page 6: ...red Write 68 84 03 ADI Required Write 2 2 INPUT VIDEO PIXEL CLOCK FREQUENCY 170MHZ The following settings are required for input video resolutions with a pixel clock of greater than170 MHz For these r...

Page 7: ...i 576i 480p and 576p resolutions with color depths between 24 bit and 36 bit HDMI Map 68 85 11 ADI Required Write 68 86 9B ADI Required Write 68 89 03 ADI Required Write 68 9B 03 ADI Required Write 68...

Page 8: ...ADI Required Write 4 LOW VERTICAL FREQUENCY FORMATS To process low frame rate video formats such as 720p24 720p25 and 720p30 the NEW_VS_PARAM bit should be set Figure 2 illustrates how to proceed to d...

Page 9: ...TING TMDSPLL_LCK_X_MB1 or TMDSPLL_LCK_X_MB2 1 ENABLE NEW_TMDS_FRQ_ST INTERRUPT BY SETTING NEW_TMDS_FRQ_MB1 or NEW_TMDS_FRQ_MB2 TMDS FREQUENCY READ BACK NOT VALID OR STABLE READ THE TMDS FREQUENCY TMDS...

Page 10: ...68 83 FC Enable clock termination manually on both part A and port B The clock termination can also be enabled automatically This can be done by setting TERM_AUTO HDMI Map Register 0x01 0 to 1 8 FREE...

Page 11: ...ditional power savings can be achieved by using the following writes Disable ring oscillator 68 48 01 Power down DDC pads 68 73 03 10 PACKET DETECTION The ADV7619 does not generate an interrupt when a...

Page 12: ...END VS_INFO_ST has been set indicating that VS_INFO_RAW has changed Is VS_INFO_RAW high IO Map 0x60 4 YES NO Clear status bit IO Map 0x62 4 Enable Software timer for max allowed packet repeat time tim...

Page 13: ...O NO Is Timer Enabled Is Timer Enabled Is time max allowed packet repeate time YES YES YES Is VS_INFO_RAW bit high IO Map 0x60 4 Clear VS_INFO_RAW Infoframe Map 0xEC 0x81 Enable Interrupt Mask IO Map...

Page 14: ...loped by Philips Semiconductors now NXP Semiconductors HDMI the HDMI Logo and High Definition Multimedia Interface are trademarks or registered trademarks of HDMI Licensing LLC in the United States an...

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