Analog Devices ADSP-BF518F EZ-Board, Manual

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ADSP-BF518F EZ-Board Evaluation System Manual 1-15
Using ADSP-BF518F EZ-Board
Parallel Peripheral Interface (PPI)
The ADSP-BF518F processor provides a parallel peripheral interface
(PPI), supporting data widths up to 16 bits. The PPI interface provides
three multiplexed frame syncs, a multiplexed clock, and 16 multiplexed
data lines. The full PPI port is accessible on the expansion interface II
connector (
P3
). See “Expansion Interface II Connector (P3)” on
page 2-28 .
The PPI signals connect to multi-functional pins. The PPI is shared with
the on-board codec, eMMC, SD, and Ethernet IC. To use the PPI on the
expansion interface, disable the codec by turning switch
SW15
to all
OFF
(see “SPORT0 ENBL Switch (SW15)” on page 2-13 ). The eMMC is dis-
abled by turning switches
SW20
and
SW21
to all
OFF
, and the SPI flash is
disabled by removing the jumper from
JP16
. See “eMMC Enable Switch
(SW20–21)” on page 2-15 and “SPI FLASH CS Enable Jumper (JP16)”
on page 2-18 .
The PPI is not used on the EZ-Board, the PPI is intended for use on the
expansion interface II.
Rotary Encoder Interface
The ADSP-BF518F processor has a built-in, up-down counter with sup-
port for a rotary encoder. The three-wire rotary encoder interface connects
to the thumbwheel rotary switch (
SW19
) and expansion interface II. The
rotary encoder can be turned clockwise for the up function, counter clock-
wise for the down function, or can be pushed towards the center of the
board to clear the counter.
The rotary switch is a two-bit quadrature (gray code) counter with a
detent, meaning that both the down signal (
CDG
) and up signal (
CUD
) tog-
gle when the count register increases on a rotation to the right. Upon
rotating to the left,
CDG
and
CUD
toggle, and the overall count decreases.