LEDs and Push Buttons
3-12
ADSP-21262 EZ-KIT Lite Evaluation System Manual
Table 3-6
shows how to set up the clock multiply ratio using positions 3
and 4. By default, the DSP increases the clock multiply ratio by 8, setting
the core clock to 300 MHz.
Loop-Back Test Switch (SW11)
The loop-back test switch (
SW11
) is connected to
GPO1
of the CS8416. The
functionality of
GPO1
is programmable via SPI.
LEDs and Push Buttons
This section describes the functionality of the LEDs and push buttons.
Figure 3-6
shows the locations of the LEDs and push buttons.
ON
OFF
Flash Boot
1
ON
ON
Internal Boot Mode
1 Bold typeface denotes the default setting.
Table 3-6. Core Clock Rate Configuration
CLKCFG1 (Position 4)
CLKCFG0 (Position 3)
Core to CLKIN Ratio
OFF
OFF
3:1
OFF
ON
16:1
ON
OFF
8:1
1
1 Bold typeface denotes the default ratio.
ON
ON
NA
Table 3-5. Boot Mode Configuration (Cont’d)
BOOTCFG1 Pin (Position 2)
BOOTCFG0 Pin (Position 1)
Boot Mode
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